• Designed by the legendary Seymour Cray "leading a small team of only 34 Control Data employees including the janitor!" in the early 1960s
• Considerations in computer design - Leading Up to the Control Data 6600" by James E. Thornton (external .pdf)
• each 60 bit word held:
  • 1 floating point value
  • 10 6 bit characters (pre ASCII :-)
  • 4 15 bit (register) instructions or fewer 30 bit (memory access) instructions
• 1 instruction could be issued each 0.1 microseconds, conditional upon functional unit, register, and data availability
• 1 instruction word look-ahead, 12 previous instruction words instantly available
• Gordon Bell lecture notes
• Gordon Bell 6600 system diagram and also see the next diagram (#40)
• James E. Thornton "Parallel operation in the Control Data 6600", in Chapter 39 of "Computer Structures: Readings and Examples" by C. Gordon Bell & Allen Newell
• James T. Humberd was a CDC 6600 salesman, and used these slides to present the system.

   - specific task dedicated PPs
         -  main CPU and PP scheduling by the "monitor" 
         -  disk driver
         -  monitor driver
         -  printer driver dumping from disk
                 via the disk driver
         -  card reader driver buffering to disk
                 via the disk driver
         -  tape driver (after "we" re-wrote it.)
   - float tasks for the remaining PPs for other tasks
 
The program in the main CPU could
  - request specific tasks like 
       - open input and output files
           by placing a request in ?address 100??
       - terminating itself
       - ...
  - operate I/O circular queues in main memory
       - the PPs would try to keep these areas full
          or empty depending if  the file was
          for input or output
That is the general flavor -
You may remember that when special systems found that
each request for a tape I/O caused 
  - a PP to be assigned for that task, 
  - the program for that PP's task loaded from disk, 
  - that I/O record done
  - the PP dropped back into the general pool of PPs
       for re-assignment for anything
We got excited about the inefficiency and slowness
  and "we" re-wrote it to stay around,
  doing tape I/O for as many task as were around,
  dropping back to the PP pool only if idle for seconds.

Quirks

Quirks - the Scope operating system expected a time limit parameter on the job control card. Oddly, you were forced to give the job time limit in OCTAL SECONDS. There was a limit of 5 octal digits permited in any field of the job control card, so 77777 (octal) was the maximum time you could request. (If your job took more compute time than that, your job was terminated, - output files to that point were retained.) Octal 77777 converts into 32767 (decimal) seconds, 546 (decimal) minutes, or 9.1 hours. Several books now quote a mean-time-between-failures (MTBF) for the 6600 as 9 hours. I could not imagine where that number could have come from. (Our 6600's ran months with out unscheduled maintenance time. Every few months the CDC Customer Engineers would (rather rudely) demand machine time - like to do Engineering Change Orders). I now suspect that the quoted 9 hour MTBF in recent books came inadvertently from the maximum CPU time requestable. To give an idea of the reliability of the 6600, I liked to program and calculate Pi as a method of learning a new machine's assembly language. I did it to 500,000 decimal places in about 60 hours on a CDC-6600 one Thanksgiving weekend. Because of the length of time, I had to write a check point dump of the intermediate results after 8 hours, and restart the job from the check point dump, over and over until the job was done. That meant I went into work every 8 hours all during that weekend until the 60 hour running time was complete. There was no worry on my part that the 6600 would fail during that weekend run - and the value of Pi was correct as determined later from faster machines with larger memories. Quirks - the use of OCTAL parameters on the Scope job control card was passionately defended by most other Control Data employees. They could not imagine why an expensive computer should have to do a decimal to binary (octal) conversion when a human could do it instead. (Really true, Unbelivable!!)

CDC 7600

The CDC 7600 was main processor code compatable with the CDC 6600, and the clock was ALMOST 4 times faster. 27.5 nanoseconds Extensive pipelining within the functional units permitted even more than a 4x speed increase over the 6600. More peripheral units were standard, used slightly differently see Gordon Bell slide sequence different packaging, smaller, tighter nine functional units instead of 10 in 6600

• Cray-Cyber.org by John G. Zabolitzky - spotted by Dag Spicer
• " Desktop Cyber Emulator Home" much info, many links. spotted by Jim Seay
• Chippewa Falls Museum of Industry and Technology
• The Control Data CDC 6400:"The punchcard period" - a very readable description of the SCOPE operation system, including the available displays on the CRTs.
• Welcome To The Bayview Club - describes CDC 6600 compontents including the Bryant disk drive.
• Design of a Computer - The Control Data 6600 by Jim Thornton (did the CDC6400) on another web site
• 6400/6500/6600 Computer Systems Reference Manual on bitsavers

overview

detail

Dr. Dobbs Journal

> Message: 20
> Date: Sat, 8 Mar 2008 21:18:32 -0800
> From: "Rick Bensene" rickb@bensene.com
> cctalk@classiccmp.org
...
 

> 
> The displays on the console were driven by a PPU (Peripheral Processing
> Unit), which were small scalar processors (actually, one processor
> multiplexed to appear as a number of independent CPUs), akin to small
> minicomputers (like a PDP-8), which operated out of shared sections of
> main memory.  There was a PPU program that ran the display, generating
> it from data in a section of memory. 

In SCOPE, PP # 10 was dedicated to this purpose -

Each time shared PP (using a common adder) had its own memory of 
4 K 12 bit words.  This reduced the traffic to main memory.

PP # 1 was normally assigned to monitor requests from the jobs
   assigned to "control points".  A job would place a request in
   its relative memory location 0 for service by the system.
   PP # 1 would monitor these requests and assign other
    PPs to do the work, causing a PP to load a new program 
     if  necessary.
   

I worked in CDC Special Systems from 1966 to 1971 - 
    We shipped a version of SCOPE modified to run "Time Critical"
     which used modified code in PP #1 to guarantee user choice of 
           - analog and discrete inputs
           - x milliseconds CPU time
           - analog and discrete output
        on a guaranteed time cycle -
    This was the best in the world at the time for doing hybrid computing :-))
         which unfortunately was on its way out :-((
    A system program to calculate resources to see if 
          a new "time critical" user could be added to the running list.
    
>  The displays were vector only, not  raster.  

Yes :-))

> There was dedicated hardware in the display console that did
> CDC character set (a 6-bit code) conversion to vector characters.

Not in any system we shipped, and we could run the "EYE"
   and Northwestern University CHESS program with 
        another PP displaying the chess pieces in nice form
        on the right hand scope.
   The left hand scope being assigned to monitoring
     activity at the normally 8 "control points",
        showing activity and requests for operator intervention
        such as mounting/removing tapes and printer(s) out of paper...
    
> Vector graphics were possible, within the limitations of the speed of
> the PPU.  

Each PP had a 100 nano-second time sharing of the adder each 1 microsecond -
    hence a relatively hard upper limit of 10 PPs with out a special
    order for another 10 ( for customers such as Boeing).

On later 6x00-series systems, such as the CYBER-73, the PPUs
> ran fast enough to generate a nice looking all-vector chessboard on the
> left screen, and a text-based transcript of the moves on the right
> screen.  There were also a number of other cute programs, one being a
> pair of eyes (one on each screen) which would look around and blink.
> The operating system was called KRONOS, and I clearly remember that the
> console command to run the "eye" program was "X.EYES".

Greg R. Mansfield had KRONOS going, and shipping to some customers,
      - mostly educational - by the time I left. 
  Greg  was kind of a one man band - a bit of a Dilbert 
     - a remarkably imaginative and productive individual -
        
I left CDC long before the CYBER-73
....
> 
> Rick Bensene
> The Old Calculator Museum
> http://oldcalculatormuseum.com

Ed Thelen

 

CDC Cyber Emulator spotted by Jim Seay
Tom Hunter reported in December 2002 to the following Newsgroups: comp.sys.cdc, alt.folklore.computers

> Here is a Christmas present for you: CDC Cyber mainframes are back!
>
> The just released Desktop Cyber Emulator version 1.0 emulates a
> typical CDC Cyber mainframe and peripherals. This release contains
> sources for the emulator and tools, as well as binaries compiled for
> Win98/NT on Intel/AMD PCs. You can download the release from
> "http://members.iinet.net.au/~tom-hunter/"
     (New e-mail and web address)
>
> The emulator runs the included Chippewa OS tape image (handcoded in
> octal by Seymour Cray).
>

PROCEEDINGS OF THE IEEE, VOL. 76, NO. 10, OCTOBER 1988
   (starting on page 1292)


F. A 1960 Supercomputer Design and a Missile Using Silicon Planar Transistors

Two of the first silicon bipolar n-p-n transistor products 
should go into the historical record book, not only for the 
enormous profits they generated which enabled Fairchild 
Semiconductor Laboratory to greatly increase its research 
and development efforts that led to the rapid introduction 
of whole families of volume produced silicon transistors 
and integrated circuits, but also for setting the pace on computer 
system designs based on the availability of certain 
superior transistor performance characteristics, such as 
speed and especially reliability.

The origin of the first product was the gold-doped high-peed (16 ns) 
switching n-p-n transistor, 2N706. It was a 
smaller mesa (three-times smaller diameter at 5-mil or an 
area of 1.2 x 10-4cm2) and higher speed version of the 2N696 
bipolar silicon n-p-n discussed in Section IV-D which had 
been marketed by Fairchild in 1960. Gold is a highly efficient 
recombination center for electrons and holes. In order to 
increase the switching speed, gold was diffused into the 
transistor to reduce the minority carrier lifetime and thus 
the charge storage time in the base and collector layers of 
the 2N706. 

Based on this existence proof, Control Data Corporation 
awarded Fairchild Semiconductor Laboratory a 
$500 000   development contract to produce a still higher 
speed silicon transistor switch to meet the first requirement ---- 
the high switching speed (less than three nano-seconds) of the 
10-MHz (3MIPS) CDC-6600 scientific computer [69]. 

The second requirement was reliability since 
there were 600 000 transistors in the CPU. That contract was 
followed up by a $5M production contract for 10 million 
units of high speed, gold-diffused, transistors and 2.5 million 
units of high speed, gold-diffused, diodes in September 1964. 

In fact, the transistor specifications of 3-ns and
high reliability were arrived at by the CDC computer 
designers based on the required speed and reliability to 
complete a numerical solution of a scientific problem without 
interruption from a computer hardware failure [69]. 

In order to achieve several thousand hours of CPU run-time 
without failure, high reliability from the individual silicon 
planar transistors was the most critical consideration owing 
to the large number of transistors (600 000) used in the CPU 
of the CDC-6600. Noyce's monolithic technology has greatly 
improved the numerics of reliability today. 

For example, 
the 600 000 transistors in CDC-6600 is only about one-half 
of the number of transistors contained in a1-mega-bit(Mbit) 
DRAM chip which has a projected chip operating life of 10 
years and as many as nine or more 1-Mbit chips can be used 
in a single personal computer today which rarely experiences 
MOS memory failures and whose failures are usually 
due to the crash of the mechanical magnetic disk drive. 

To 
meet both the 3-ns and high-reliability specifications, Fairchild 
engineers shrunk the circular 16-ns mesa 2N706 transistor down
 to a three-finger stripe geometry and used oxide 
passivation for stabilization. They also improved the yield 
by using an epitaxial layer to control the resistivity. The 
result was the 2N709 which met the 3-ns switching time and 
high reliability requirements. It gave a 2000 CPU-hour operating 
time before a transistor fails. 

This was a very large 
development and production contract for the design and 
delivery of only one transistor type-by comparison, it took 
only about $250 000 to start a silicon transistor manufacturing 
company in 1960. High speed and high reliability of 
the 2N709 met the critical requirements that made the first 
scientific computer possible.

....