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PDP-8

Manufacturer DEC - Digital Equipment Corporation
Identification,ID PDP-8, then the PDP-8i, then ...
Date of first manufacture1960??? (1964?)
Number produced over 50,000
Estimated price or cost PDP-8 - $20,000 (1960 dollars) ($18,995 minus teletype, etc.)
PDP-8i - (? - 1968 ) - integrated circuit,
PDP-8s - (? - 1969 ) - serial had a 2 bit adder, and a shift register,
reduced the price
and many more mostly code compatable models *
location in museum -
donor -

Contents of this page:

Photo

Photo
PFP-8F Pictures from e-bay of a PDP-8L system 1, 2, 3, 4, 5, 6

Placard
-

Architecture
12 bit words, 8 instructions, instruction was 3 bits - same instruction set as PDP-5 Architecture max addressability (except for special tricks in some models) - 4096 words

Instruction List, Page 1, 2

see Chapter 5 of "Computer Structures: Readings and Examples", by C. Gordon Bell & Allen Newell


From "Digital at Work" , Digital Press, copyright 1992, page 45

                 Specification - PDP-8
First shipped

    April 1965
Word length
    12 bits
Speed
    1.5-microsecond cycle time
Primary memory
    4K 12-bit word core memory
Secondary memory
    32K maximum

Instruction set
    3-bit op code, 1 indirect bit
    8 bits of address
    Addressing subdivided into 1 page bit
    and 7 bits of absolute address
Input/Output
    Teletype (ASR-33) standard
    Standard I/O includes paper-tape
    reader and punch on ASR-33
    DECtape available thereafter
Software
    Paper tape, includes symbolic editor,
    FORTRAN system, PAL II Assembler,
    PDP-8 Dynamic Debugging Tape,
    Floating Point System, Symbol Print,
    Macro 8 Symbolic Assembler
Architecture
    Single accumulator
    2's complement arithmetic
    All PDP-8 systems parallel,
       except the serial PDP-8/S
Power

    780 watts
History
    Logic modules derived from flip chip series,
    developed for general sale by Don White,
    Russ Doane... Modules developed for the
    PDP-8 include the R210 (accumulator),
    R211(PC, MB, MA) and
    G808 (power supply control)
Price
$18,000



Computing in the '60s

On campus at MIT and Stanford, scientists and students were making headway with timesharing and expert systems, and at Bell Labs, UNIX simplified and standardized some of the timesharing and filesharing features of the Multics operating system that was developed jointly by MIT, GE, and Bell.

Every decrease in the price/performance ratio - a result of the shrinking size and price of semiconductors, and increased speed and reliability- offered the possibility of computing' to new users. The U.S. government used computers first to; test rockets before launch, provide onboard guidance, and track multiple targets via phased-array radar. Industry soon recognized the gains of making banking more accessible through automated tellers, making airline reservations more: convenient over a telephone network, and monitoring freight trains more efficiently via automated databases.

Special features
from LaFarr Stuart
  • Identical instruction set to PDP-5 except that P Counter was in a real register instead of memory location 0
  • (Initial) (Straight) 8, all discrete components, resistors transistors
  • the 8
  • Had a 3 microsecond memory cycle, most instructions 2 memory cycles. The first to get the instruction, and the second to get/store the operand. Therefore most instructions took 6 microseconds.
  • Loader was traditionally swich keyed into the top 128 words of memory. No one would intentionally overwrite this area.
  • OS-8, an 8 inch floppy disk operating system, nicely done. ;-)
  • CPM is reputed to be a poorly done reverse engineered OS-8.
  • DEC later sold a built in loader, in 128 word ROM, switched into and out of the address space. (Please verify.?)
-

Historical Notes
See DEC 12 Bit Time Line


from PDP-8 Summary of Models and Options

Subject: What is a PDP-8?

Date of introduction:  1965 (Unveiled March 22, in New York).
Date of withdrawal:    1968.
Total production run:  1450.
Also known as:
        Classic PDP-8 (to point out lack of a model suffix)
        Straight-8 (Again, points out the lack of a model suffix)
        PCP-88, an OEM label, used by Foxboro Corporation.
        AN/GYK-6, (Army-Navy Ground-based (Y)data-processing Komputer 6)
Price: $18,000

Technology:  Mostly standard DEC R-series logic modules; these were
        originally discrete component transistor logic, but around the
        time the PDP-8 was introduced, DEC introduced the Flip Chip, a
        hybrid diode/resistor "integrated circuit" on a ceramic substrate.
        These could directly replace some of the discrete components on
        some logic modules, and DEC quickly began to refer to all R-series
        modules as flip-chip modules; they even advertised the PDP-8 as
        an integrated circuit computer.  A typical flip-chip module, the
        R111, had three 2-input nand gates and cost $14, with no price
        change from 1965 to 1970.  Some special dual height R-series
        modules were designed specifically for the PDP-8.

        S and B-series logic modules were also used; these are similar
        to their R-series cousins, but with different speed/fanout
        tradeoffs in their design.  Some logic modules have trimmers
        that must be tuned to the context, making replacement of such
        modules more complex than simply swapping boards.

        As with the system modules used in the PDP-5, the supply
        voltages were +10 and -15 volts and the logic levels were -3
        (logic 1) and 0 (logic 0).  Logic was packaged on boards that
        were 2.5 inches wide by 5 inches long.  The card edge connector
        had 18 contacts on 1/8 inch centers.  Some double height cards
        were used; these had two card edge connectors and were 5 1/8
        inches high.  Machine wrapped wire-wrap technology was used on
        the backplane using 24-gauge wire.

        The "negibus" or negative logic I/O bus used -3 and 0 volt logic
        levels in 92 ohm coaxial cable, with 9 coaxial cables bundled
        per connector card and 6 bundles making up the basic bus.  5
        (later 4) more bundles were required to support data-break (DMA)
        transfers.  The total bus length was limited to 50 feet, and bus
        termination was generally kluged in with 100 ohm resistors
        clipped or wrapped into the backplane, although a bus terminator
        card was sometimes used.  Some time after the first year of
        production, flat ribbon cable made of multiple coaxial cables
        was used, and later still, shielded flat stripline cable was used
        (but this cut the allowed bus length by a factor of two).

        Core memory was used, originally made by FERROXCUBE, with a 1.5
        microsecond cycle time, giving the machine an add time of 3
        microseconds.  4K of core occupied an aluminum box 6 inches on a
        side and needed numerous auxiliary flip-chips and for support,
        as well as an array of boards from the core vendor.  It is worth
        noting that the PDP-8 was about as fast as was practical with the
        logic technology used; only by using tricks like memory
        interleaving or pipelining could the machine have been made much
        faster.

Reason for introduction:  This machine was inspired by the success of
        the PDP-5 and by the realization that, with their new Flip-Chip
        technology, DEC could make a table-top computer that could be
        powered by a single standard wall outlet; of course, adding any
        peripherals quickly increased the power requirement!

...

Standard configuration:  The PDP-8 was sold as a CPU with 4K of memory,
        a 110 baud current loop teletype interface and an ASR 33 Teletype.
        In addition, the standard in-cabinet logic includes support for
        the full negibus interface, including data-break (DMA) transfers.

        Both a rack-mount model with rosewood trim and an elegant
        plexiglass enclosed table-top configuration were standard.  Under
        the skin, the basic machine occupies a volume 33 inches high by
        19 inches wide by 22 inches deep.  The two halves of the backplane
        are mounted vertically, like the covers of a book, with the
        spine in back and circuit modules inserted from the two sides.
        Sliding the CPU out of the relay rack or removing the plexiglass
        covers allows the backplane to swung open to access the wires-wrap.
...

This Specimen
-

Interesting Web Sites

Other information
  • from David M. Razler
    There was a two pass FORTRAN compilier for the 4 K core PDP-8. Add a DF-32 32K-word HD and you didn't even have to rethread paper tape.
  • from lafarr
    INTERSIL made a CMOS microprocessor clone PDP-8, marketed by them as the INTERCEPT system which included non-DEC compatable back plane and marketed at a higher price than DEC was selling the PDP-8. This was not a marketing success.


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Updated Febuary 6, 2002