Word size - 12 bit words, 
Max addressable memory - 4096 words max 

The 12 bit accumulator had a 13th bit (past high order bit) was "link bit".
The "link bit" was very useful in multi-precision arithmetic 
   - common in a machine that can only count 0 to 4095.

8 instructions, instruction code was 3 bits - see "small computer handbook"
This makes the  modern "RISC" machines look "complex" like the CISC machines!

Op Code 
bits

000 -
001 -
010 - Conditional Skip Instruction, TRUE skipped the next instruction.
        The next instruction could be a jump instruction.
	Remaining 9 bits defined the skip conditions
           such as: skip on zero, skip on negative, 

011 - Deposit Accumulator (store accumulator) and sets accumulator to zeros

100 -
101 -

110 - Jump to Subroutines, return address placed at target address,
	and execution started one address higher 
111 - Unconditional Jump  


Instruction format (12 bit word)
------------------------------------------------------
3 bits opcode | 1 bit page  | 1 bit indirect | 7 bits of address
  (see above)
---------------------------------------------------------------
page bit - if 0 - then use low memory (ignore hi 5 bits of P register)
           if 1 - use "current page (use hi 5 bits of P register)

indirect bit - if 0 - use regular addressing
               if 1 - use address as indirect address

7 bits of address - low seven bits of addressing

---------- start page 0 description ------------
Memory locations
000 - 177 octal

000 007 = normal page 0  memory
010 017 = special memory, refered to as autoincrementing locations
              If you referenced it indirectly, it autoincremented
	      you can do a block move using 2 autoindex locations.
	This concept copied by Ed DeCastro for the Data General NOVA series.
020 177 = normal page 0  memory

---------- end of page 0 description ----------

DEC divided memory into 128, 177 octal pages


There was no load instruction, you deposited the accumulator, 
     which cleared it, then added the operand to the zero.

The disadvantages of this system were
  - the inability to address more than 4096 words, 
  - the addressing across the 128 pages was really awkward,
  - the 128 page zero words required careful management.
The advantages of this system were
  - you could do a surprising amount in 4096 12 bit words
      - including compile and run a FORTRAN program
  - price, price, price.

see Architecture and Timeline at PDP-8.

• P register (Instruction counter) was in memory
• Macro 5 was assembler,

Subject: What is a PDP-5?

Date of introduction:  Aug 11, 1963, unveiled at WESCON.
Date of withdrawal:    early 1967.
Total production run:  116.
Price: $27,000

Technology:  The PDP-5 was built with DEC System Modules, the original
        line of transistorized logic modules sold by DEC.  The supply
        voltages were +10 and -15 volts, with logic levels of -3 (logic 1)
        and 0 (logic 0).  Logic was packaged on boards that were about
        4.75 inches high with each card mounted in a metal frame with a
        22 pin edge connector.

        Input output devices were connected to the daisy-chained I/O bus
        using military-style armored cables and connectors.  Use of
        toggle switches (as opposed to slide switches) on the front
        panel was another vestige of military-style design.

Reason for introduction:  This machine was inspired by the success of
        the CDC-160, Seymour Cray's 12 bit minicomputer, and by the
        success of the LINC, a machine that was built by DEC customers
        out of System modules.  These demonstrated that there was a
        market for a small inexpensive computer, and from the start,
        DEC's advertisements were aimed at this market.  "Now you can
        own the PDP-5 computer for what a core memory alone used to
        cost: $27,000", ran one 1964 ad.

        Ken Olson has stated that the PDP-5 was not originally meant to
        be a computer; it was designed for a company that wanted an
        automatic controller for some industrial work.  He told them
        they could make a small programmable controller instead of the
        hardwired machine they were asking for, and since they weren't
        entirely certain of the control equations they wanted to run, they
        accepted the idea. The result was the PDP-5.

From "Digital at Work" , Digital Press, copyright 1992, page 49

12-Bit Family Timeline 1962 Laboratory Instrument Computer (LINC) developed at MIT 1963 PDP-5, Digital's first 12-bit computer 1965 "Classic" PDP-8 world's first mass-produced minicomputer 1966 LINC-8 combines LINC and PDP-8 processors PDP- 8/S, serial version of the PDP-8 1967 PDP-8 systems manufactured in Reading, England Annual sales:$38 million 1968 LAB-8, small, general-purpose laboratory package TSS/8 timesharing software PDP-8/I, integrated circuit version of be PD18 PDP-8/L 1969 PDP-12, third member of LINC family 1970 PDP-8/E features OMNIBUS synchronous bus for bidirectional communications between system elements TABS-8 newspaper application 1971 PDP-8/M, OEM version of 8/E 1972 PDP-8/F 1974 PDP-8/A miniprocessor PDP-8/A package allows OEMs choice of memory type and quantity 1976 PDP-8/A 600 series WPS-8 word-processing software CMOS-8 chip 1977 VT78,complete PDP-8 system in a terminal, uses the CMOS-8 chip, anticipating the DECmate series WS 102, multiuser WPS 1982 DECmateII word processor 1984 DECmate III

• Digital Equipment Corporation PDP-5 Manual, 1964 @7.2MB.