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ILLIAC IV

Manufacturer Burroughs - Paoli, Pa.
Identification,ID ILLIAC IV
Date of first manufacture1974
Number produced 1
Estimated price or cost-
location in museum -
donor NASA Ames Research Center

Contents of this page:

Photo
ILLIAC-IV

Placard
Link to ILLIAC-IV - by Ron Mak

Architecture
"D. L. Slotnick is responsible for the ILLIAC IV computer.""professor until his death in 1985."
  • 1 "control unit" (CU) which could access all system memory and control the 64 processing elements (PEs)
  • each "processing element" had some local memory
  • each "processing element" had some memory shared with "adjacent" processing elements
  • from http://www.gigaflop.demon.co.uk/comp/chapt7.htm#7.4
    many identical interconnected processors under the supervision of a single control unit, see figure 7.1.2. The control unit transmits the same instruction, simultaneously, to all processors.

    All the processing elements simultaneously execute the same instruction and are said to be 'lock-stepped' together. Each processor works on data from its own memory and hence on distinct data streams. (Some systems also provide a shared global memory for communications.) Every processor must be allowed to complete its instruction before the next instruction is taken for execution. Thus, the execution of instructions is said to be synchronous.

    This category corresponds to the array processors discussed in section 2.3.3 and examples include; ILLIAC-IV, PEPE, BSP, STARAN, MPP, DAP and the Connection Machine (CM-1).

  • word size 64 bits, can work in a half-word 32 bit mode, then appears as an array of 128 processors.
  • front-ended by a Burroughs B6700, later DEC PDP10
  • processors are arranged in a linear chain and have nearest-neighbour connections, Every processor is able to address the memory of its nearest neighbours. (In addition to the nearest-neighbour connections the ILLIAC-IV also provides direct short-cut communications between every 9th processing element.) These machines can also be called connected arrays.
  • from http://dynamo.ecn.purdue.edu/~hankd/CARP/XPC/paper.html
    ... Thus, a GLYPNIR program specification is closely associated with the Illiac IV hardware. The Illiac IV consists of 64 processing elements (PEs) and a single control unit (CU). Each processing element may directly access 2048 words of memory, and may indirectly access any address within the system. Interprocessor communication can take place through an interconnection network that allows PEs to directly communicate with other processors that have logical distances of +-1 or +-8.

Special features
  • from http://www.cee.vt.edu/evd/Htmls/P417218.html
    Thirteen rotating fixed head disks comprised part of the central system memory of the mid-1960s ILLIAC IV, one of the first computers to use all semiconductor main memories. (from J.A.N. Lee, VPI&SU , Annals of the History of Computing, 10(4), 1988, p. 462.)
  • from http://ei.cs.vt.edu/~history/Parallel.html
    Each processor has a peak speed of 4 MFLOPS; the machine's I/O system is capable of 500 Mbit/s.
  • from http://www.acn.net.au/cgi-bin/foldoc.cgi?Illiac+IV
    The project started in 1965, it used 64 processors and a 13MHz clock. In 1976 it ran its first sucessfull application. It had 1MB memory (64x16KB).

    Its actual performance was 15 MFLOPS, it was estimated in initial predictions to be 1000 MFLOPS. It totally failed as a computer, only a quarter of the fully planned machine was ever built, costs escalated from the $8 million estimated in 1966 to $31 million by 1972,

  • The language was called GLYPNIR, a reference to a rope, in Norse mythology, made to contain a vicious monster.

Historical Notes
From http://www.net.org/html/history/detail/1966-ILLIAC.html "the computer museum" is
1966 - ILLIAC The Department of Defense Advanced Research Projects Agency contracted the University of Illinois to build a large parallel processing computer, the ILLIAC IV, which did not operate until 1972 at NASA's Ames Research Center. The first large-scale array computer, the ILLIAC IV achieved a computation speed of 200 million instructions per second, about 300 million operations per second, and 1 billion bits per second of I/O transfer via a unique combination of parallel architecture and the overlapping or "pipe-lining" structure of its 64 processing elements. This photograph shows one of the ILLIAC's 13 Burroughs disks, the debugging computer, the central unit, and the processing unit cabinet with a processing element.

References
Author Hord, R. Michael, 1940-
Title The Illiac IV, the first supercomputer / R. Michael Hord
Publ. info. Rockville, Md. : Computer Science Press, c1982

Story of obtaining ILLIAC IV by NASA AMES
Computers and Computational Fluid Dynamics at Ames The story of the center's rise to prominence

Time Line
http://wotug.ukc.ac.uk/parallel/documents/misc/timeline/timeline.txt
========1964========
Air Force signs ILLIAC-IV contract with University of Illinois. The
project is led by Daniel Slotnick; primary subcontractors are
Burroughs and Texas Instruments. (MW: ILLIAC-IV)
========1975========
ILLIAC-IV becomes operational at NASA Ames after concerted check out
effort. (MW: ILLIAC-IV)
========1982========
ILLIAC-IV decommissioned. (GVW: ILLIAC-IV)


from http://www.illinimedia.com/di/nov_98/nov6/news/news03.html

Mahur said that right around this time, there was a problem with a computer called Illiac IV. According to the Jan. 6, 1970 edition of The Daily Illini, the Department of Defense had been planning to put in a $24 million supercomputer on campus. In return for the computer, government agents would be able to use it for military research.

Illiac IV was to be the most powerful computer on the face of the earth at that time.

The project, however, was met with hostility by protesters that were suspicious of the University’s tie with the Department of Defense and felt that the University had sold out to a conspiracy. The protests reached a boiling point on May 9, 1970, in a day of "Illiaction." Eventually, the University backed out and Illiac IV was moved to another location.

There is a Smash ILLIAC poster at
http://images.grainger.uiuc.edu/gcm/ccm/Detail.CFM?Image__imageID=133&decade=All


from http://www.cs.uiuc.edu/about/history.html

the University of Illinois.
1946 UI faculty attempt to build a computer that can play checkers. ENIAC (Electronic Numerical Integrator And Calculator) is built at the University of Pennsylvania by J. P. Eckert and John Mauchly. A year later, the President's Science Advisory Committee Panel on Computers in Higher Education states: "After growing wildly for years, the field of computing now appears to be approaching its infancy."

1948 John von Neumann, a pioneer in computer design at the Institute for Advanced Study in Princeton, New Jersey, suggests that the Illinois research group build a computer. J. Robert Oppenheimer gives Illinois permission to build a copy of von Neumann's proposed machine. John Bardeen co-invents the transistor at Bell Telephone Laboratories, for which he wins the Nobel Prize in 1956. (He wins another in 1972 for co-developing the theory of superconductivity.) He would become professor of physics and electrical engineering at the University in 1951

. 1949 The U.S. Army and the University of Illinois jointly fund the construction of two computers, ORDVAC and ILLIAC. The Digital Computer Lab is organized. Ralph Meagher, a physicist and chief engineer for ORDVAC, is head.

1951 ORDVAC (Ordnance Variable Automated Computer), one of the fastest in existence, is completed. It was ten feet long, two feet wide, eight and one-half feet high, contained 2,800 vacuum tubes, and weighed five tons.

1952 ORDVAC moves to the Army Ballistic Research Laboratory in Aberdeen, Maryland. It is used remotely from Illinois via a teletype circuit up to eight hours each night until the ILLIAC computer is completed.

ILLIAC, the first computer built and owned entirely by an educational institution, becomes operational. It was used by Lajaren Hiller, director of the Experimental Music Studio, to compose and play the Illiac Suite, the first computer-composed composition. UI faculty publish what is believed to be the first journal article in behavioral and social sciences involving a computer.

1955 A four-bit prototype transistorized computer is constructed at UI's Digital Computer Laboratory.

1957 UI faculty demonstrate a flip-flop 10 times faster than any other design in use. The Digital Computer Laboratory becomes a department in the Graduate College. Studies are underway of advances such as transistors, parallel operation, high-speed circuitry, and improved logic to better the usefulness, speed, and reliability of computers.

1958 UI establishes an experimental music studio where digital computers are used to generate music for the first time. Professor James E. Robertson, an electrical engineer who was an expert in error-checking systems, pioneers basic techniques of efficient binary division. The SRT division algorithm, now found both in hardware and software implementations of the divide instruction and widely used in the most powerful microprocessors, is named after D. Sweeney, Robertson, and T.D., who independently invented the method at about the same time. The campus got an IBM 650, which was used in the design of research instruments like high-energy particle accelerators and radio telescopes.

1961 UI faculty demonstrate advanced "virtual load" circuits with one nanosecond rise and fall times. Using the ILLIAC as a computational engine, UI faculty introduce PLATO, ...

1962 ILLIAC II, a transistorized computer 100 times faster than the original ILLIAC, becomes operational. ACM Computing Reviews says of the machine, "...ILLIAC II, at its conception in the mid-1950s, represents, together with some other independent design projects of the same period, the spearhead and breakthrough into a new generation of machines." Researchers from the ALCOR group in Europe join UI faculty in the design of an ALGOL compiler. ILLIAC I was retired.

1963 A pattern recognition computer, being designed at Illinois since 1960, becomes the ILLIAC III project. The machine was to analyze bubble chamber photographs of high energy particle events. (Due to a building fire, it was never finished.) Professor Donald B. Gillies discovered three Mersenne prime numbers in the course of checking out ILLIAC II, including the largest then known prime number, 211213-1, which is over 3,000 digits, putting him in the Guiness Book of Records for a time.

1965 The University of Illinois and Burroughs collaborate on the development of the ILLIAC IV, the largest and fastest computer in the world. The ILLIAC IV project, headed by Professor Daniel Slotnick, pioneers the new concept of parallel computation. Slotnick had worked under John von Neumann at Princeton. ILLIAC IV was a SIMD computer (single instruction, multiple data) and it marked the first use of circuit card design automation outside IBM. It was also the first to employ ECL (Emitter-Coupled Logic) integrated circuits and multilayer (up to twelve layers) circuit boards on a large scale. Most notable was its use of semiconductor memory. Undergraduate degree program in math/computer science is established in the College of Liberal Arts and Sciences.

1967 ILLIAC II is retired, the second addition to DCL was completed, and the department installed its first IBM 360, which was incorporated into the ILLINET, one of the earliest computer networks..

1972 UI Professor John Bardeen shares the Nobel Prize in physics for developing the theory of superconductivity. It is Bardeen's second; the first was for inventing the transistor. Undergraduate degree program in computer science is established in the College of Engineering.

1974 ILLIAC IV becomes operational at the Institute for Advanced Computation, Moffett Field, California. The Office of Telecommunications and Computer Services Office merged to form CCSO, the Computing and Communications Services Office.

1975 Illinois is awarded UNIX license number one by Bell Laboratories. Graduate student Greg Chesson becomes the third person to contribute to the Bell Labs UNIX kernel.

1976 Illinois researchers use computers to prove the four-color theorem, a long standing conjecture in graph theory.

1978 University of Illinois Library, the largest public university library in the country, is among the first to provide public on-line access to a major collection. Today, the catalog accesses more than four million records in UI's collection.

from http://acomp.stanford.edu/siliconhistory/Flamm/Flamm_TargetComputer.html
... very expensive ILLIAC IV supercomputer. This machine was dismantled at the end of the 1970s and so too was NASA's computer research budget. Construction in the early 1980s of NASA's massively parallel processor (MPP) and its numerical aerodynamic simulator (NAS) boosted the agency's computer research once again.


from http://tractor.mcs.kent.edu/~walker/classes/pdc.f99/lectures/L02.pdf
Illiac IV History

  • Major speedup alternatives:
    • Overlap (pipelining & buffering)
    • Multiprocessors
    • SIMD (duplicate the PE. not the CU)
      • Vector processor
  • Three earlier designs (vacuum tubes and transistors) culminating in the Illiac IV design, all at the University of Illinois
    • Logical organization similar to the Solomon (prototyped by Westinghouse)
    • Sponsored by DARPA, built by various companies, assembled by Burroughs
    • Plan was for 256 PEs, in 4 quadrants of 64 PEs, but only one quadrant was built
    • Used at NASA Ames Research Center in mid-1970s
Illiac IV Architectural Overview
  • One CU (control unit), 64 PEs (processing elements), each PE has a PEM (PE memory)
  • CU operates on scalars, PEs on vectors
    • All PEs execute the instruction broadcast by the CU, if they are in active mode
    • Each PE can perform various arithmetic and logical instructions
    • Each PE has a 2048-word 64-bit memory, can be accessed in less than 350 ns
    • PEs can operate on data in 64-bit, 32-bit, and 8-bit formats
  • Data can be routed between PEs in various ways
  • I/O is handled by a separate Burroughs B6500 computer (stack architecture)
The Illlac IV Array
  • Array = CU + processor array
  • CU (Control Unit)
    • Controls the 64 PEs (vector operations)
    • Can afso execute instructions (scalar ops)
    • 64 64-bit scratchpad registers
    • 4 64-bit accumulators
  • PE (Processing Element)
    • 64 PEs, numbered 0 through 63
    • RGA = accumulator
    • RGB = for second operand
    • RGR = routing register, for communication
    • RGS = temporary storage
    • RGX = index register for insfruction addrs.
    • RGD = indicates active or inactive slate
  • PEM (PE Memory)
    • Each PE has a 2048-worci 64-bit local random-access memory
    • PE 0 can only access PEM 0, etc.
  • PU (Processing Unit) = PE + PEM
  • Data paths
    • CU bus 8 words of instructions or data can be fetched from a PEM and sent to the CU (Instructions distributed in PEMs)
    • CDB (Common Data Bus) broadcasts information from CLJ to all PEs
    • Routing network PE / is connected to PE/-1,PE/+1,PE 1-8, and PE 1+8
    • Wraps around, data may require multiple transfers to reach its destination
    • Mode bit line single line from RGD of each PE to the CU
Programming Issues
  • Consider the following FORTRAN code:
    DO 10 I = 1, 64
    10 A(1)=B(1)+C(1)
    • Put A(1), B(1), C(1)on PU 1, etc.
      • Each PE loads RGA from base+1, adds base+2, stores into base, where "base" is base of data in PEM
      • Each PE does this simultaneously, giving a speed up of 64
    • For less than 64 array elements, some processors will sit idle
    • For more than 64 array elements, some processors might have to do more work
  • For some algorithms, it may be desirable to turn off PEs
    • 64 PEs compute, then one half passes data to other half, then 32 PEs compute, etc.
Illiac IV I/O System
  • I/O system = I/O subsystem, DFS, and a B6500 control computer
  • I/O subsystem
    • CDC (Control Descriptor Controller) interrupts the B6500 upon request by the CU, also loads programs and data from the DFS into the PEM array
    • BIOM (Buffer I/O Memory) buffers (much faster) data from DFS lo CPU
    • IOS (I/O Switch) selects Input from DFS vs. real-time data
  • DFS (Disk File System?)
    • 1 Gbit, 128 heads (one per track)
    • 2 channels, each of which can transmit or receive data at 0.5 Gb/s over a 256-bit bus (1 Gb/s using both channels)
  • B6500 control computer
    • CPU, memory, peripherals (card reader, card punch, line printer, 4 magnetic tape units, 2 disk files, console printer, and keyboard)
    • Manages requests for system resources
    • OS, compilers, and assemblers
    • Laser memory
      • 1 Tbit write-once read-only laser memory
      • Thin film of metal on a polyester sheet, on a rotating drum
      • 5 seconds to access random data
    • ARPA network link
      • High-speed network (50 Kbps)
      • Illiac IV system was a network resource available to other members of the ARPA network
Illiac IV Software
  • Illiac IV delivered to NASA Ames Research Center in 1972, operational sometime (?) after mid -1975
    • Eventually operated M-F, 60-80 hours of uptime, 44 hours of maintenance / downtime
  • No real OS, no shared use of Illiac IV, one user at a time
    • An OS and two languages (TRANQUIL & GLYPNIR) were written at Illinois
    • At NASA Ames, since POP-10 and PDP-11 computers were used in place of the B6500, new software was needed, and a new language called CFD was written for solving differential equations

This Artifact
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Interesting Web Sites

Other information
from Eugene Miya - Oct 3, 2011
Well the ILLIAC Wing is across from me.

My old boss Ken wrote the only language seriously used for the thing (CFD). Do not believe anything about any of other cited languages. Well maybe Vectoral by Alan Wray was also used.

I briefly visited when a college roommate was doing documentation for another part of Informatics.

I started working here after it was decommissioned and a Cray-1S was brought in briefly, to be replaced with the first Cray X-MP (s/n 301?) and a (the only) 4-pipe Cyber 205.

We video taped a presentation in B126.

The hardware problems were notorious.
It was good for up to a week.

--------------- following refers to another document ---------------------------

> ILLIAC IV: Groundbreaker
...
> Key to the design was parallel operation with 256 processors ...

One really should NOT use the term "processors" they are more properly called processing elements (PEs) because they lacked control of which there were planned 4 control elements.

> The processing unit of the ILLIAC IV was composed of LSI bipolar ECL integrated circuits.
> These were added by the University of Illinois and the Burroughs Corporation.

The ECL was too new in integrated circuits. No, UIUC designed the thing (Dan Slotnick), Burroughs implemented the thing. That's the hardware, but that Fairchild building across from 101 has been knocked down and Nokia was briefly on that site.

> Viet Nam war protests disrupted many university campuses. ...
> Three months after the bombing at a University of Wisconsin mathematics building, ...

"disrupted:" Worse, a researcher was killed when the UW Madison was bombed. 2 of the 3 guys were caught and served time. #3 has never surfaced. The project was picked up by Hans Mark, the youngest director Ames ever had, who came from LLL where he saw the computational future when nuclear testing had to go underground. My first Ames office actually had a copy of the proposal which I wish I still had.

> In addition to being massively parallel, it was massively late, massively over budget,
>and massively outperformed by existing commercial machines such as Cray-1 ...

"outperformed:" is not the right word. The ILLIAC because it had fixed head disks could do faster I/O. It's not clear if a TMC Data Vault would be faster. Some things are faster, others are slower. Parallelism is constrained byt the serial.

> ILLIAC IV Software
> In order to make this as easy as possible, several new computer languages were created;
> IVTRAN and TRANQUIL were parallelized versions of FORTRAN, and ...

IVTRAN,TRANQUIL, and Glypnir: yeah, these were all dead languages. Only good for academic papers. No one would use an ALGOL-based language in this country except for toy problems. The only real operational languages were CFD and Vectoral. Back then, only the UIUC (Dave Kuck) would do research on parallel language software. Dave has seen it all, I feel sorry somewhat for him. Dave has seen all the issues, and how he go ignored by many.

Programming vector and parallel machines has been cited by DARPA as still a major problem. Don't let any one fool you. Only the stuff stuff has been solved. No simple drop in parallelism.

> A Fortran Anniversary
> On September 20, 1954, Harlan Herrick ran the first FORTRAN program.
>This wonderful first FORTRAN compiler was designed and written from scratch in
>1954-57 by an IBM team lead by John W. Backus ...

John Backus was from Ashland, OR. More people should know that. I am not certain that John would have call his first released compiler "wonderful." "Won the battle" is clean sounding understatement. It was messy. It took decades. It continues to be messy. This all sounds way too clean. John was pissed off when IBM would NOT give him support on his FP and FL projects. He expressed that when he was made a Museum Fellow. He noted that IBM had more V-Ps than Fellows. I liked John a lot from our time exchanging email and the few social events we were a part.


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