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Manufacturer Rand Corporation, Santa Monica, California
Identification,ID Johnniac
Date of first manufacture1953?
Number produced 1, many other IAS versions at universities and government institutions
Estimated price or cost-
location in museum -
donor rescued from RAND parking lot by CHM :-|

Contents of this page:


Johnniac - by Ron Mak

The JOHNIAC had an interesting heritage.
John von Neumann et.al. wrote a report after studying the ENIAC, (see Preliminary Discussion of the Logical Design of an Electronic Computing Instrument" by Burks, Goldstien, & von Neumann) describing a desirable computing machine.

This was implemented as the IAS computer (Institute for Advanced Study). (It was first operational in 1952.)

The builders of the IAS computer (Institute for Advanced Study) in Princeton, N.J, (not Princeton University) under the direction of John von Neumann, were contractually obliged to share their designs with other research institutions.

This resulted in a number of (not necessarily code compatible) clones, including:
from Lyle Bickley
  • AVIDAC (Argonne National Laboratory)
  • BESK (Stockholm)
  • BESM (Moscow)[4]
  • CYCLONE (Iowa State University)
  • DASK (Regnecentralen, Copenhagen 1958)
  • GEORGE (Argonne National Laboratory)
  • ILLIAC I (University of Illinois at Urbana Champaign)
  • MANIAC I (Los Alamos National Laboratory)
  • MISTIC (Michigan State University)
  • MUSASINO-1 (Musashino, Tokyo, Japan)
  • ORACLE (Oak Ridge National Laboratory)
  • ORDVAC (Aberdeen Proving Ground)
  • SILLIAC (University of Sydney)
  • SMIL (Lund University)
  • WEIZAC (Weizmann Institute)

from LaFarr Stuart
  • direct clones of the IAS were -> Illiac I, -> Cyclone (Iowa State University, Ames, IA) (Illiac I and Cyclone (and possibly the Johnniac) were op code compatable)
  • 2 instructions per 40 bit word
    execute left instruction, then execute right instruction
  • to branch to the left or right instruction, the branch instructions were:
    Branch right,
    Branch left
  • of a 20 bit instruction, the left most 8 bits were the OP Codes,
    each bit controlled gating
  • the right most 12 was address to a 40 bit word,
  • original machines had 1024 words of Selectron vacuum tubes,each holding 256 bits of data
    people tended to use the unused high 2 bits in the address field for other things
  • later magnet core memory totalling 4096 memory locations was substituted
    programs the used the "unused bits" (above), broke. Much Johnniac/Illiac code did not work any more.
  • Multiply and divide added at the time of the core enhancement to Cyclone
    upgrade started in summer 1960
  • Had A and Q(uotient) registers - even before multiply and divide
  • Had no index registers,
    To do a move data loop you had to modify the address part of instruction(s) (now considered pornographic)
  • only one condition testable
    (high order bit of accumulator set or not)
  • No hardware floating point

Johnniac instruction list (220 K bytes)

Special features
from LaFarr Stuart May, 2000; expanded August 2009, Jan 2011
  • Illiac 1 had 5 level paper tape for I/O (input/output)
  • Iowa State University duplicated Illiac 1,
    including 1024 word Williams tube memory, and 5 level paper tape.
  • Then, after running it for a year,
    it was enhanced to 8 level tape, and magnetic core memory.
  • Cyclone never had anything for I/O other than 8 level paper tape
  • Core memory had transistor drivers and sense, interfaced to tube computer
    (4 stacks of 4096 words each) - a couple of unused bits in the shift instruction were used for bank switching
  • On the Cyclone (a Johnniac clone), one switch on console was testable by program.
  • A 4 word loader, magic 1st word, helped bring in loader from paper tape.

Notes - Jan 18, 2011
      later (4 core stacks ) replaced Williams tube memory
             ( transistorized Art core drivers Colm buffer for output )
             (Robert Stewart - chief honcho ) ( Roy Zing - hardware -> fairchild )
            Sept 1960   five level -> eight level  paper tape
           cyclone 10 -> 12 bit address
                   20 bit half word instruction, 8 bit opcode )

Added Dec 2011 from LaFarr Stuart
The only I/O on the Cyclone was an 8 level paper tape reader and a punch. (The first Illiac used 5-level paper tape and forty Williams tubes for memory giving 1024 forty bit words.)

First we used modified Flexowriters which were not ASCII these each had a paper tape reader and punch, initally we had 4; and all output was displayed on them. One of the modifications was a small "10" as a single character which printed a bit below the base line for alphas & digits; and we called it sub-ten. That allowed us to write such things as 2.3 x "10"8 for floating point output. (There was no floating point in the hardware, it was all done via software.)

Now to answer your question: For digits greater than 9 we used: ,.;:! and sub-ten. (I am certain , had value of ten and . was eleven and sub-ten had a value of fifteen; but I am not sure about the remaining 3 symbols.) The four arithmetic operators were not sex digits.

Before we got the assembler going, Bob Sharpe and I wrote everything using the 16 sex digits. (The Cyclone & the Illiac all used a 40 bit words for memory and registers.) Yes, the assembler and all the diagnostic/test routines were written in words of ten sex digits.

It was fun and challenging to get a computer going with only the hardware of that one computer. No cross assemblers on another machine, for example.

Cheers, LaFarr Stuart
I'm in Quartzsite
928-927-8001 Home

Jim Humberd says here that there was a meeting at the Johnniac Computer where the meeting notice said that this was the first public demonstration of a typewriter communicating with a computer. "The funny thing was (at least funny after all these years), they used a typewriter with a two color — black and red — ribbon. They thought it was very important that everything the operator typed was in black, and the computer’s answers were printed in red."

Historical Notes
from the “Annals of the History of Computing”, Vol.2 #3 July 1980
In February 1954, the JOHNNIAC went on the air at RAND, using a Selectron memory of 256 words. (The contract had already been let for a core memory for JOHNNIAC.) Honesty insists that it be recorded that the machine was computing (of all things) prime numbers then as one of its first test routines.
In February 1955, JOHNNIAC got its 4096-word core memory from International Telemeter (now Telemeter Magnetics); this was the first large, commercially produced core memory. The presence of TMI (the only independent core manufacturer on the West Coast) is itself part of the computing history of this area.

Historical Note from http://www.rand.org/facts/ware.html

"At the same time, a commercial industry was beginning to emerge. In late 1953, RAND installed an IBM 701 (serial number 11). It came with rudimentary programming support tools, such as an assembler and a library. However, since the concept of an operating system had not yet evolved, the programmer would have hands-on possession of the machine for a specified period of time. At the end of the assigned time slot, a printout (memory dump) and perhaps a card deck would be the basis for examination of the program's behavior. If the run crashed, a special camera arrangement could take a Polaroid picture of the display lights on the console."

Historical Note from http://www.wired.com/wired/archive/7.11/computer_pr.html

"$300,000 ... - was the only computer at the time to use Selectron memory. Each of the 80 glistening Selectron vacuum tubes held 256 bits of data and cost RCA $500 to manufacture. (Hence, Selectron memory was quickly replaced by core memory, a matrix of tiny iron-oxide rings representing 1s or 0s, depending on the direction of magnetization.)

This Specimen

Interesting Web Sites
An excellent description and animation of the Johnnic's original Selectron memory by Charles Osborne. local copy snapshot June 18, 2013

A YouTube video "Building Computers in 1953: The Johnniac" - [Recorded: September 15, 1998] speakers = Willis Ware, Bill Gunning, Mort Bernstein & Paul Armer - I'm in the front row of the audience - my balding head all too visible -

from LaFarr Stuart

from Judy Lewis (Rand Corp. Rights and Permissions Editor)
"... .pdf file "The History of the Johnniac" by F. J. Gruenberger
just added to Online RAND Research Documents: RAND Classics"

Final Progress Report on the Physical Realization of an Electronic Computing Instrument" (IAS machine) by Goldstine, Pomerene, Smith - spotted by Leif Harcke

from Ed Thelen - the presentation on YouTube John Von Neumann Documentary Part 2 shows the "Princeton IAS Computer" in a Smithsonian warehouse with Herman Goldstine in 1966. I took the following screen shots:
- note that the machine
has the original "Williams Tube" memory !!

from "Fagin, Barry S. Dr. USAF USAFA USAFA/DFCS" < Barry.Fagin@usafa.edu > April 19, 2010

If you are reading this, it means that a few months ago you expressed interest in learning more about an emulator for the Princeton IAS Machine. Not finding anything satisfactory out there, Dale Skrien and I leveraged his existing meta-emulator to produce one, and over the past several weeks have used it in our classes. We'd now like you to try it. See this link:


Macintosh users might also want to download the standalone Mac application version at


The zip file includes installation instructions and a sample input program. We now have a fairly extensive library of small IAS programming problems and solutions, so please feel free to put it through its paces and let us know what you think. We're especially eager to get bug reports.

FYI, Dale and I expect to write this up for SIGCSE and JERIC sometime soon. Thanks for being the canaries in our coal mine!


Other information
from an introduction at the Computer History Museum

The JOHNNIAC was one of an illustrious group of computers built in the early 1950's, all inspired by the IAS computer designed by John von Neumann at the Institute for Advanced Study in Princeton. Some of these other machines were the MANIAC (Los Alamos) and the ILLIAC (Univ. of Illinois), as well as WEIZAC, AVIDAC, and ORDVAC. JOHNNIAC was built at the RAND Corporation in Santa Monica, and named after John von Neumann himself.

JOHNNIAC ran for the first time in March, 1954. It pioneered the development of time shared operating systems with JOSS (the JOHNNIAC Open Shop System). JOSS could support several dozen users with drum swapping. JOHNNIAC was also one of the first users of magnetic core memory, which dominated computer memories for the next 25 years. Among other tasks, JOHNNIAC was also used to develop digitizing tablets for computer input.

This talk will be given in front of The JOHNNIAC itself since this remarkable machine is now part of the permanent collection of The Computer Museum History Center--home to the world's largest collection of historical computer hardware.

Our speakers were all working on JOHNNIAC over 40 years ago. Willis Ware led the development of JOHNNIAC and received the IEEE Pioneer Award in 1994 for this work. Bill Gunning was the computer engineer who built JOHNNIAC; Paul Armer managed the Numerical Analysis Dept. at Rand where JOHNNIAC was built, and later directed the Computation Center at Stanford University. Paul hired Mort Bernstein to work on software for JOHNNIAC at RAND, and Mort is now working on a JOHNNIAC simulator, due to be completed before the year 2000.

Mort Bernstein <mib@lafn.org> kindly provided this timeline for the JOHNNIAC, taken from his notes for a presentation given at a local ACM meeting in 1996.


JOHNNIAC went operational for the first time in the first half of 1953 (no one seems to know the exact date of this event) with 256 40-bit words of RCA Selectron Tube storage, a 40-column numeric printer, a converted IBM Collator for a card reader and a converted IBM Summary Punch. It had two 19-bit instructions per word with two sets of "transfer" instructions (what are now called jumps or branches), one set to the left half word and one set to the right half word. It had an initial repertoire of 83 instructions (four of which all cleared the accumulator to zero).

Later that year, RAND contracted with Telemeter Magnetics for the first commercially built core storage for the JOHNNIAC. The Selectron Tubes were removed in 1954 in anticipation of the installation of the core storage.

In March 1955 the machine was back on line with 4096 40-bit words of magnetic core storage. A bit later that year a 12K drum was installed.

In 1956 the analog adder circuitry was replaced with digital transistor logic. Additional transistor circuitry eventually replaced the shift registers and the multiplication and division control logic.

In 1957, the 40-column printer was replaced with a 600 line-per-minute ANelex 120-column drum printer with a 56 character repertoire.

In 1958 a 30" X 30" flat bed plotter was added.

In 1961 a 5-inch scope and the prototype of the RAND digitizing Tablet was added.

In 1962 one level indirect addressing was added to the machine using the two heretofore unused bits in the instruction format. Shortly after the machine came back on the air, it was discovered that a number of library programs ran incorrectly because the programmers had used one or both of the "unused" bits in instruction words as semaphores. A switch was added to the operator's console to disable or enable indirect addressing.

That same year, the Multiple Typewriter Communication System (MTCS) consisting of 8 IBM Model B typewriter consoles and drum buffer was added. Additional instructions were added to control the flow of data between the drum buffers and core storage.

In 1964 a real time clock was added to support the time sharing functions of JOSS (the JOHNNIAC Open Shop System).

The JOHNNIAC was decommissioned on February 11, 1966. It had been in service for 13 years and logged over 50,000 operational hours. It was one of the longest lived computers of its era. It spanned the time from the first generation of computers to the advent of the IBM 360.

Mort Bernstein

E-mail from Leif Harcke - January 2004

After a visit to the museum with some friends, an argument started as to the capabilities of early scientific computers, like the machines built from the IAS architecture. The info in the widely published Burks, Goldstine, and von Neumann "Preliminary discussion..." is nice but vague, as the hardware was vaporware when the report was written. So I finally tracked down the instruction set that von Neuman and company actually implemented:


Apparently every library that has a copy of Goldstine, Pomerene, and Smith's "Final progress report..." has put it in special collections and won't let it out on interlibrary loan. So getting access required a trip to the IAS archives in Princeton while I was home for the holidays in the Philadelphia area.

Anyway, the final set was sufficiently different from what was described in the "Preliminary discussion..." (branch left/right halfword replaced by branch same/opposite halfword, and there's a strange summation order not mentioned at all previously) that I decided to look into the instruction set implemented in the other original IAS architecture machines built in the 1949-1952 timeframe.

Leif Harcke, Electrical Engineering Dept., Stanford University, Stanford, California

A *related* (IAS based) machine was the Maniac ? at the University of Chicago

the following is from a list [inforoots] about April Fool pranks 4/4/2007
This is an April Fool's prank that failed in an amusing way, proving the need for software quality control.

The computer was Maniac III at the University of Chicago. The date was some April First between 1959 and 1964. The computer had a drum printer with 48 print positions and no brains whatsoever. So programs had to provide a print matrix, the row coordinate being the print position and the column coordinate being the desired character. So, each column had to contain one and only one "1". The chief engineer warned all programmers that the culprit who gave a print command to an address that was the start of a solid bank of 1's would have to personally replace 48 fuses. Finally, the computer was somewhat like the PDP-1 in that its hardware could read a paper tape and obey instructions therein.

The was a standard yard-long tape that was used to "boot" the machine. All it did was enter a short program that was needed to be resident; I don't remember why. This tape, being used every day, was made of a paper-mylar-paper sandwich, and over time, got to look pretty gross.

Well, my co-conspirators and I created a similar looking tape what had one function: to cause the printer to output "April Fool" in big block letters. And, of course, we kidnapped the standard boot tape and left this tape in its place. Alas, we did not have time to try out the tape. Guess what! The "April Fool" was readable only if observed through a mirror!

Herbert Kanner

Do not meddle in the affairs of cats,

for they are subtle and will pee
on your computer!

from Larry Press < lpress @ csudh . edu > Nov 16, 2012
The Joniac was at RAND and ran an interpreter called JOSS (http://en.wikipedia.org/wiki/JOSS).

JOSS was more like John Morrisey's QUICKTRAN at IBM.

Jovial was a compiled language based on Algol -- written by Jules Schwarts, the compiler was "Jules Own Version of International Algorithmic Language" -- Algol.

SDC was a RAND spinoff intended to implement systems -- mainly (perhaps only) SAGE I think. SDC was a congressional corporation and got a 6% fee for the systems they built, and that was used to fund the Research Directorate where I worked and the Q-32 was housed.

There was a JOVIAL interpreter on the Q-32 called TINT
but it was not at all like JOSS. We used to debug subroutines in TINT, then compile them using the JOVIAL compiler -- a very nice software development environment.

This article appeared in the Nov 23, 2012 ediion of
Volunteer Information Exchange" - Volume 2 Number 16
hosted by Jim Strickkland

Program an IAS Machine


The Institute for Advanced Study (IAS) machine was described in a paper by John von Neumann. The IAS was built in Princeton University (1945-51) and had many derivatives:
  • AVIDAC (Argonne National Laboratory)
  • BESK (Stockholm)
  • BESM (Moscow)[4]
  • CYCLONE (Iowa State University)
  • DASK (Regnecentralen, Copenhagen 1958)
  • GEORGE (Argonne National Laboratory)
  • ILLIAC I (University of Illinois at Urbana Champaign)
  • MANIAC I (Los Alamos National Laboratory)
  • MISTIC (Michigan State University)
  • MUSASINO-1 (Musashino, Tokyo, Japan)
  • ORACLE (Oak Ridge National Laboratory)
  • ORDVAC (Aberdeen Proving Ground)
  • SILLIAC (University of Sydney)
  • SMIL (Lund University)
  • WEIZAC (Weizmann Institute)
Although all these and many subsequent systems are based on what is commonly called "Von Neumann Architecture", their design and implementation was based on the contributions of not only von Neumann, but many others.

I recently discovered (via the SIMH group, and more specifically, Nelson Beebe, Research Professor and Software Specialist, University of Utah) a great educational tool for learning what it was like to program the IAS!

This Java application emulates the Princeton IAS system and will run on Linux, Windows and Macintosh computers. It can be downloaded from:

In order to make writing programs easier, there is a very simple higher level language called "JVNTRAN" which compiles into IAS assembly language. A built in assembler assembles the code and loads it into the virtual IAS machine for execution.

One hint - the default IAS comes with only 32 words of Selectron memory. Before trying any of the examples, up the "Selectron" size to at least 256 words via "Preferences".

One of the example programs provided is a Prime Number Calculator. After running it, you will be able to read the results from memory, starting at location 40 (hex) -just as if you were sitting at the IAS console (only with an easier to read display).

For those who want to read von Neumann's original paper, it can be found in both text and pdf formats at:

And if you try it, or want to try it and need some help, let me know. I'll be glad to see what I can do..

Lyle. lbickley@bickleywest.com

If you have comments or suggestions, Send e-mail to Ed Thelen

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Updated April 13, 2014