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Johnniac
| Manufacturer | Rand Corporation, Santa Monica, California
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| Identification,ID | Johnniac
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| Date of first manufacture | 1953?
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| Number produced | 1, many clones at universities
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| Estimated price or cost | -
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| location in museum | -
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| donor | -
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Contents of this page:
Photo
Placard
Architecture
The JOHNIAC had an interesting heritage.
John von Neumann et.al. wrote a report after studying the ENIAC,
(see Preliminary Discussion of the Logical Design of an Electronic Computing Instrument"
by Burks, Goldstien, & von Neumann) describing a desirable computing machine.
This was implemented as the
IAS computer (Institute for Advanced Study). (It was first operational in 1952.)
The builders of the IAS computer (Institute for Advanced Study) in Princeton, N.J,
(not Princeton University)
under the direction of John von Neumann, were contractually obliged to share their designs
with other research institutions.
This resulted in a number of clones, including:
- the MANIAC at Los Alamos Scientific Laboratory,
- the ILLIAC at the University of Illinois,
- the Johnniac at Rand Corp. (Santa Monica, CA),
- the SILLIAC in Australia, and others.
(As per
Smithsonian)
from LaFarr Stuart
- direct clones of the IAS were -> Illiac I, ->
Cyclone (Iowa State University, Ames, IA)
(Illiac I and Cyclone (and possibly the Johnniac) were op code compatable)
- 2 instructions per 40 bit word
execute left instruction, then execute right instruction
- to branch to the left or right instruction, the branch instructions were:
- Branch right,
- Branch left
- of a 20 bit instruction, the left most 8 bits were the OP Codes,
- each bit controlled gating
- the right most 12 was address to a 40 bit word,
- original machines had 1024 words of Selectron vacuum tubes,each holding 256 bits of data
people tended to use the unused high 2 bits in the address field for other things
- later magnet core memory totalling 4096 memory locations was substituted
programs the used the "unused bits" (above), broke.
Much Johnniac/Illiac code did not work any more.
- Multiply and divide added at the time of the core enhancement to Cyclone
upgrade started in summer 1960
- Had A and Q(uotient) registers - even before multiply and divide
- Had no index registers,
To do a move data loop you had to modify the address part of instruction(s)
(now considered pornographic)
- only one condition testable
(high order bit of accumulator set or not)
- No hardware floating point
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Johnniac instruction list (220 K bytes)
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Special features
from LaFarr Stuart May, 2000
- Illiac 1 had 5 level paper tape for I/O (input/output)
- Iowa State University duplicated Illiac 1, then enhanced it after 1 year
- Cyclone never had anything for I/O other than 8 level paper tape
- Core memory had transistor drivers and sense, interfaced to tube computer
(4 stacks of 4096 words each) -
a couple of unused bits in the shift instruction were used for bank switching
- On the Cyclone (a Johnniac clone), one switch on console was testable by program.
- A 4 word loader, magic 1st word, helped bring in loader from paper tape.
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An excellent description and animation of the Johnnic's original
Selectron
memory by Charles Osborne. (Opens in a new window)
Jim Humberd says here that
there was a meeting at the Johnniac Computer where the meeting notice said that
this was the first public demonstration of a typewriter communicating with a
computer.
"The funny thing was (at least funny after all these years), they used a typewriter with a two color
— black and red — ribbon. They thought it was very important that everything the operator
typed was in black, and the computer’s answers were printed in red."
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Historical Notes
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Historical Note from http://www.rand.org/facts/ware.html
"At the same time, a commercial industry was beginning to emerge. In late 1953, RAND installed
an IBM 701 (serial number 11). It came with rudimentary programming support tools, such as an
assembler and a library. However, since the concept of an operating system had not yet evolved, the
programmer would have hands-on possession of the machine for a specified period of time. At the
end of the assigned time slot, a printout (memory dump) and perhaps a card deck would be the
basis for examination of the program's behavior. If the run crashed, a special camera arrangement
could take a Polaroid picture of the display lights on the console."
Historical Note from http://www.wired.com/wired/archive/7.11/computer_pr.html
"$300,000 ... - was the only computer at the time to use Selectron memory.
Each of the 80 glistening Selectron vacuum tubes held 256 bits of data and cost RCA $500
to manufacture. (Hence, Selectron memory was quickly replaced by core
memory, a matrix of tiny iron-oxide rings representing 1s or 0s,
depending on the direction of magnetization.)
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This Specimen
Interesting Web Sites
Other information
from an introduction at the Computer History Museum
The JOHNNIAC was one of an illustrious group of computers built in the
early 1950's, all inspired by the IAS computer designed by John von Neumann
at the Institute for Advanced Study in Princeton. Some of these other
machines were the MANIAC (Los Alamos) and the ILLIAC (Univ. of Illinois),
as well as WEIZAC, AVIDAC, and ORDVAC. JOHNNIAC was built at the RAND
Corporation in Santa Monica, and named after John von Neumann himself.
JOHNNIAC ran for the first time in March, 1954. It pioneered the
development of time shared operating systems with JOSS (the JOHNNIAC Open
Shop System). JOSS could support several dozen users with drum swapping.
JOHNNIAC was also one of the first users of magnetic core memory, which
dominated computer memories for the next 25 years. Among other tasks,
JOHNNIAC was also used to develop digitizing tablets for computer input.
This talk will be given in front of The JOHNNIAC itself since this
remarkable machine is now part of the permanent collection of The Computer
Museum History Center--home to the world's largest collection of historical
computer hardware.
Our speakers were all working on JOHNNIAC over 40 years ago. Willis Ware
led the development of JOHNNIAC and received the IEEE Pioneer Award in 1994
for this work. Bill Gunning was the computer engineer who built JOHNNIAC;
Paul Armer managed the Numerical Analysis Dept. at Rand where JOHNNIAC was
built, and later directed the Computation Center at Stanford University.
Paul hired Mort Bernstein to work on software for JOHNNIAC at RAND, and
Mort is now working on a JOHNNIAC simulator, due to be completed before the
year 2000.
Mort Bernstein <mib@lafn.org> kindly provided this timeline for
the JOHNNIAC, taken from his notes for a presentation given at a local ACM
meeting in 1996.
JOHNNIAC
JOHNNIAC went operational for the first time in the first half of 1953
(no one seems to know the exact date of this event) with 256 40-bit words
of RCA Selectron Tube storage, a 40-column numeric printer, a converted
IBM Collator for a card reader and a converted IBM Summary Punch. It had
two 19-bit instructions per word with two sets of "transfer" instructions
(what are now called jumps or branches), one set to the left half word and
one set to the right half word. It had an initial repertoire of 83 instructions
(four of which all cleared the accumulator to zero).
Later that year, RAND contracted with Telemeter Magnetics for the first
commercially built core storage for the JOHNNIAC. The Selectron Tubes were
removed in 1954 in anticipation of the installation of the core storage.
In March 1955 the machine was back on line with 4096 40-bit words of
magnetic core storage. A bit later that year a 12K drum was installed.
In 1956 the analog adder circuitry was replaced with digital transistor
logic. Additional transistor circuitry eventually replaced the shift registers
and the multiplication and division control logic.
In 1957, the 40-column printer was replaced with a 600 line-per-minute
ANelex 120-column drum printer with a 56 character repertoire.
In 1958 a 30" X 30" flat bed plotter was added.
In 1961 a 5-inch scope and the prototype of the RAND digitizing Tablet
was added.
In 1962 one level indirect addressing was added to the machine using
the two heretofore unused bits in the instruction format. Shortly after
the machine came back on the air, it was discovered that a number of library
programs ran incorrectly because the programmers had used one or both of
the "unused" bits in instruction words as semaphores. A switch
was added to the operator's console to disable or enable indirect addressing.
That same year, the Multiple Typewriter Communication System (MTCS) consisting
of 8 IBM Model B typewriter consoles and drum buffer was added. Additional
instructions were added to control the flow of data between the drum buffers
and core storage.
In 1964 a real time clock was added to support the time sharing functions
of JOSS (the JOHNNIAC Open Shop System).
The JOHNNIAC was decommissioned on February 11, 1966. It had been in
service for 13 years and logged over 50,000 operational hours. It was one
of the longest lived computers of its era. It spanned the time from the
first generation of computers to the advent of the IBM 360.
Mort Bernstein
E-mail from Leif Harcke - January 2004
After a visit to the museum with some friends, an argument started as to
the capabilities of early scientific computers, like the machines built
from the IAS architecture. The info in the widely published Burks,
Goldstine, and von Neumann "Preliminary discussion..." is nice but vague,
as the hardware was vaporware when the report was written. So I finally
tracked down the instruction set that von Neuman and company actually
implemented:
http://www.stanford.edu/~lharcke/programming/IAS_Final_Report.pdf
Apparently every library that has a copy of Goldstine, Pomerene, and
Smith's "Final progress report..." has put it in special collections and
won't let it out on interlibrary loan. So getting access required a trip
to the IAS archives in Princeton while I was home for the holidays in the
Philadelphia area.
Anyway, the final set was sufficiently different from what was described
in the "Preliminary discussion..." (branch left/right halfword replaced by
branch same/opposite halfword, and there's a strange summation order not
mentioned at all previously) that I decided to look into the instruction
set implemented in the other original IAS architecture machines built in
the 1949-1952 timeframe.
Leif Harcke, Electrical Engineering Dept., Stanford University, Stanford, California
A *related* (IAS based) machine was the Maniac ? at the University of Chicago
the following is from a list [inforoots] about April Fool pranks 4/4/2007
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This is an April Fool's prank that failed in an amusing way, proving the need for software quality control.
The computer was Maniac III at the University of Chicago. The date was some April First between 1959 and 1964. The computer had a drum printer with 48 print positions and no brains whatsoever. So programs had to provide a print matrix, the row coordinate being the print position and the column coordinate being the desired character. So, each column had to contain one and only one "1". The chief engineer warned all programmers that the culprit who gave a print command to an address that was the start of a solid bank of 1's would have to personally replace 48 fuses. Finally, the computer was somewhat like the PDP-1 in that its hardware could read a paper tape and obey instructions therein.
The was a standard yard-long tape that was used to "boot" the machine. All it did was enter a short program that was needed to be resident; I don't remember why. This tape, being used every day, was made of a paper-mylar-paper sandwich, and over time, got to look pretty gross.
Well, my co-conspirators and I created a similar looking tape what had one function: to cause the printer to output "April Fool" in big block letters. And, of course, we kidnapped the standard boot tape and left this tape in its place. Alas, we did not have time to try out the tape. Guess what! The "April Fool" was readable only if observed through a mirror!
--
Herbert Kanner
kanner@acm.org
650-326-8204
Do not meddle in the affairs of cats,
for they are subtle and will pee
on your computer!
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Updated April, 2007
