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NBS Circular 551
Computer Development (SEAC and DYSEAC)
at the National Bureau of Standards
Washington, D.C.

For download convenience, this "e-book" is divided into chapters
- and the resolution reduced to 150 pixels/inch
Chapter 1
4.7 MBytes
Foreword, by A. V. Astin
Introduction, by S. N. Alexander
1. SEAC, by S. Greenwald, S. N. Alexander, and Ruth C. Haueter
Chapter 2
2.0 MBytes
2. Dynamic circuitry techniques used in SUMAC and AMNESIAC, by R. D. Elbourn and R. P. Witt 27
Chapter 3
8.1 MBytes
3. DYSEAC, by A. L. Leiner, S. N. Alexander, and R. P. Witt 39
Chapter 4
4.0 MBytes
4. System design of the SEAL and DYSEAC, by A. L. Leiner, W. A. Notz, J. L. Smith, and A. Weinberger . 73
Chapter 5
3.7 MBytes
5. High-speed memory development at the National Bureau of Standards, by R. J. Slutz, A. W. Holt, R. P. Witt and D. C. Friedman
- Section 2. The NBS Mercury Memory
- Section 3. Cathode-Ray Tube Memory
- Section 4. Diode-Capacitor Memory
Chapter 6
1.9 MBytes
6. Input-output, devices for NBA computers, by J. L. Pike and E. F. Ainsworth 109
Chapter 7
3.6 MBytes
7. Operational experience with SEAC, by J. H. Wright, P. D. Shupe, Jr., and J. W. Cooper 119
Chapter 8
2.5 MBytes
8. SEAC-Review of three years of operation, by P. D. Shupe, Jr., and R. A. Kirsch 137

For comments, e-mail Ed Thelen
Date March 12, 2013