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|Early British Computers, APPENDIX I, starting page 106|
A General concepts
A modern computer has four main sections which are conceptually linked as shown in figure A1.1 The input unit could be any device which converts letters, numbers and symbols into their electronic representation inside the computer. The simplest example is an electric keyboard similar to that used on a typewriter. Alternatively, information can be prepared on punched paper tape or punched cards, which are then fed into the computer via a paper tape reader or a card reader.A1.1 +-----------+ _| | /| Store |\ / | | \ / +-----------+ \ +-----------+ / | | \ +-----------+ | | / | | \ | | | Input |/ | | _\| Output | | | V ^ | | +-----------+ | | +-----------+ +-----------+ | | | CPU | | | +-----------+The output unit could be an electric typewriter, or a lineprinter. Alternatively, a visual display unit (VDU) could be used where a direct presentation of results is required.
The CPU or central processing unit is where the computation is actually carried out. It contains two sections: an arithmetic and logic unit (ALU) and a control unit. During execution of a program the CPU fetches instructions one by one from the store and obeys them. In principle an addition instruction, for example, could require the CPU to fetch from the store the quantities to be added, i.e. the operands, then perform the addition, and finally return the answer to a designated location. The
Early British Computers, APPENDIX I, starting page 107
time taken to perform a single addition instruction was usually about a millisecond (10-3 seconds) on the early computers. Later developments have achieved times of microseconds (i.e. 10-6 seconds) or even nanoseconds (10-9 seconds).
The store, or memory, is used to hold two types of information: firstly, the program or list of instructions prepared by the user; secondly, the data or facts which are required during the solution of a particular problem. The computer has no innate (in-built) intelligence, and in general it is necessary to feed in a fresh program and fresh data each time a new problem is to be solved.
The storage unit is crucial. Indeed, it is, historically speaking, the main distinguishing feature of the modern computer, when compared with other aids to calculation. In order to store and process information accurately and at high speed, the computer's store and CPU deal with all types of information in numerical, i.e. digital, form. Therefore, any information which, in the everyday sense, is initially non-numerical has to be converted to a digital representation before computation takes place.
A1.2 Address Contents +--------+-----------------------------+ | 0 | - First word - | +--------+-----------------------------+ | 1 | - Second word - | +--------+-----------------------------+ | 2 | - Third word - | +--------+-----------------------------+ | 3 | | +--------+-----------------------------+ | | | + + + | | | +--------+-----------------------------+ | 63 | - Sixty-fourth word - | +--------+-----------------------------+Bearing the above in mind, a computer's store may be imagined as many equal-sized pigeon-holes or locations, each one storing information as a string of digits. (Remember that everything is represented internally by digits.) Each store location is designated by a unique address, and the row of digits at each location is termed a word. Thus a simple picture
Early British Computers, APPENDIX I, starting page 108
of a 64-location store is shown in figure A1.2. Each word, which may represent either an instruction or data, is a string of digits. For reasons of engineering economy, computers use a binary (i.e. base two) system of numbers instead of our normal decimal (base ten) system. Examples are given below. Thus a word is a string of binary digits - abbreviated to bits. Several factors govern the choice of word length for a particular computer. An examination of a range of practical computer systems reveals that 16, 24, 32, 36 or 64 bits are popular sizes. A practical store may contain many thousand words of information.
Information may be transmitted to and from the store serially, i.e. one bit at a time, or in parallel, i.e. all the n bits of a word simultaneously down n wires. Similarly the arithmetic unit within a computer's CPU may process bits serially or in parallel. Serial mode is generally cheaper but slower. Most early computers were entirely serial; most modern ones are entirely parallel.
A1.3 Binary Corresponding Decimal Value | 16 | 8 | 4 | 2 | Units Tens | Units +----+---+---+---+-------- ------+------- | | | | | 0 | 0 | | | | | 1 | 1 | | | | 1 | 0 | 2 | | | | 1 | 1 | 3 | | | | | . | | | | | | . | | | | | | . | | | 1 | 1 | 1 | 0 1 | 4 | | | | | | | | | | | | | 1 | 1 | 0 | 0 | 1 2 | 5The binary system of numbers, alluded to above, has the advantage of requiring just two symbols, - written as '0' or '1'. Binary arithmetic implies 'columns', headed units, twos, fours, eights, etc., in place of the more usual units, tens, hundreds, etc., of the decimal system. The principle of binary numbers and their everyday decimal equivalents is illustrated in figure A1.3. (Mercifully, a knowledge of the binary system is not normally needed when using a modern computer, since conversion from decimal to binary is carried out automatically!) Since a digital computer stores and processes only digits, any other non-numeric quantities
Early British Computers, APPENDIX I, starting page 109
such as letters of the alphabet have to be assigned a simple numeric code before being input to the computer. Once again, conversion of alphabetic symbols into coded binary, and vice versa, is carried out automatically.
B Variations in CPU design
Besides some obvious technological variations, different computers often employ different basic design strategies within their CPUs. This can be illustrated by describing two possible schemes or formats for representing computational instructions.
Scheme (a): three-address instruction format
In this scheme a computer word representing an instruction could be divided as illustrated in figure A1.4, showing a 32-bit word divided into four groups of eight digits. The function digits specify the operation to be performed; the two groups of source digits specify the store addresses of two operands, and the destination digits specify where the answer is to be placed in store. Thus an instruction may specify the equivalent of say:
ADD, 24, 73, 66
which is interpreted as: 'add together the numbers found in store locations 24 and 73, placing the result in location 66'.A1.4 <-------------------------- 32 -------------------------> +-------------+-------------+-------------+-------------+ | Function | Source (A) | Source (B) | Destination | +-------------+-------------+-------------+-------------+ <-----8------> <-----8-----> <-----8-----> <-----8----->Scheme (b): one-address instruction format
An alternative layout for an instruction is shown in figure A1.5. (The partition 8/24 is for illustration and has no fundamental significance.) Each instruction now only carries one explicit operand address, though a second location is actually implied. This 'implicit' location is a oneword temporary storage place within the CPU called the accumulator register. (As a matter of terminology, a 'register' is generally used to
Early British Computers, APPENDIX I, starting page 110
denote any [temporary] storage location.) Using the one-address format, the previous addition of two operands to produce a result in store location 66 would now have to be programmed in three separate instructions, representing the equivalent of:
(a) load accumulator with the contents of address 24 (b) add into the accumulator the operand at address 73 (c) store the contents of the accumulator to address 66.
A1.5 <--------------- 32 -------------------> +----------+---------------------------+ | Function | Address | +----------+---------------------------+ <----8----> <---------- 24 ------------>It is common nowadays to have computers whose instruction formats allow specification of one operand address, though two- or three-address formats are also seen. For those early computers which had essentially serial storage units, it was sometimes convenient to make each instruction also specify the address of the next instruction to be obeyed. (This 'next' instruction was not always the one placed consecutively in store.) In order to distinguish clearly the operand and next-instruction parts of a particular instruction format, a notation was often employed whereby the extra address used for specifying the location of the next instruction was denoted by '+1'. Thus a (2+1)- address instruction format provided specification for two operand addresses plus one next-instruction address; similarly for a (3+1)-address format, etc.
C CPU registers and structure
As has been said, a register is the general name given to any storage location (apart from the main store itself). Besides an accumulator, the CPUs of all modern computers contain another very important register known variously as the program counter or control register. This register holds the address of the next instruction to be obeyed. The
Early British Computers, APPENDIX I, starting page 111
contents of this register is normally incremented during execution of an instruction, so that the CPU fetches the next sequential instruction in a program. However the programmer may alter the program counter during computation, thus causing a branch or jump in the sequence of events. The programmer may thereby cause repetitive computation, or conditional computation.
Most computers also have one or more index registers (or modifier registers, or B-lines) within the CPU. These are used for a variety of reasons, but mainly for the formation of 'indexed' or 'subscripted' operand addresses. This greatly eases the task of handling structured data such as tables and matrices inside a computer. In a simple example of indexing, the final address of an operand could be formed by the automatic addition of a 'base' address as contained in the instruction plus an 'offset' or index as contained in a special index register. If there exist facilities for incrementing and testing the contents of this index register, it is easy to write a group of instructions which, when repetitively obeyed, causes the same computation to be performed on each item in turn in a list of items whose base address (i.e. the start of the list) is known. The invention of index registers in 1948 opened the way for other forms of offset address-generation in computer design.
Given that all CPUs contain a number of registers, the design philosophies for interconnecting and controlling registers fall into two (somewhat overlapping) categories: hard-wired control or microprogram control. For the former scheme, information about which register is connected where, and when, is inherent in the way the registers and their controlling circuits are wired together; under this scheme, any modifications to the CPU design involve basic changes at the wiring level. In contrast, a microprogrammed computer has a special (normally unalterable) control store which is microprogrammed with the information about register control. The CPU's structure is made to appear as a reasonably flexible arrangement of general registers and highways, the control of which may be expressed in terms of microprogram steps. A programming methodology may then be used when designing the sequence of operations needed during the execution of each instruction. MicroProgrammed computers are in general easier to design and diagnose, but are slower than hard-wired computers.
Early British Computers, APPENDIX I, starting page 112
D Computer software
The topics introduced so far have been related to computer hardware, and certainly the construction and operation of electronic circuits was the main concern of all early computer designers. Today a computer's software (i.e. the set of organisational programs provided by the manufacturers) is often more important to the user than the hardware.
Generally speaking a computer's software consists of three categories of program: compilers, operating systems, and applications packages. A compiler is a kind of translator which accepts a user's program written in a problem-orientated high-level language and translates it into the corresponding set of basic machine instructions, ready for execution. (Fortran is the name of one popular high-level language.) An operating system is the collection of housekeeping procedures which schedules the workload through a computing system, allocating resources and keeping accounts as necessary. Applications packages are programs, or collections of subroutines, for performing particular commonly occurring jobs. It is usual for a large computer installation to have a library of subroutines.
The programmer of an early computer had to have an intimate knowledge of its internal structure. Thankfully, such knowledge is not normally needed by the user of a modern machine. The connection between old and new programming techniques is further illustrated in Chapter 15.
Early British Computers, APPENDIX I, starting page 113
Fig. A1.6A cabinet of the Cambridge University EDSAC II computer (1957), showing the microprogram control store. The important concept of microprogramming was first expounded by Professor Maurice Wilkes of Cambridge University in 1951.
|Early British Computers, Appendix 2, starting page 114|
Table 3 gives the technical specification of six pioneering British research computers, arranged in chronological order according to their date of completion. (In terms of original design ideas, the Pilot ACE and MOSAIC should probably come first.) Since all of these computers were modified as time went on, the date corresponding to the given specification is important. This and other details are given below.
Manchester Mark I: The entry in Table 3 describes the machine which was operational in April 1949. Its 500-valve predecessor, the June 1948 computer, was a very small 32- bit word, 32-line store prototype with no index registers and only seven operations in its repertoire of instructions.9 In the April 1949 version45 the word-length was changed to 40 bits and a 30 millisecond revolution-time drum was added. Extra programming facilities included two index registers (B-lines) and a double-length (80 bit) accumulator. Note that the relatively long digit-period, a function of the Williams tube storage scheme, was offset from the user's view by the random access properties of this store and the provision of index registers. A contemporary performance evaluation rated the Ferranti Mark I at about the same usable speed as the NPL Pilot ACE, even though the latter had a digit period shorter by ten times.9 Note that input/output transfers and drum transfers were initiated by operator switches, until program-control was provided in the October 1949 version of the Mark I. The Ferranti Mark I (1951) had eight index registers, addition and multiplication times of 1.2 milliseconds and 2.16 milliseconds respectively, a repertoire of 50 operations (see reference 57), and storage capacities of 256 words (CRT) and 4096 words (drum). In other respects it was the same as the October 1949 University Mark I.
Early British Computers, Appendix 2, starting page 115
Cambridge EDSAC: Table 3 describes the May 1949 version of EDSAC.19 Certain engineering improvements were carried out in 1951 and some new control transfer orders were added in 1952 and 1953. Improvements of one form or another were continued over the next three years or so. A special feature of EDSAC was the wired-in 'bootstrap' or set of initial orders, which greatly eased the problem of cold-starting.
The descendant of EDSAC at Cambridge University was the EDSAC II computer," first operational in 1957. This was a parallel machine with a 40-bit word and hardware floating-point facilities. It had a 1024-word ferrite core main store, a 1024-word core read-only memory, and magnetic tapes. Its fixed-point and floating-point addition times were respectively 20 and 75 microseconds, the corresponding multiplication times being 200 and 275 microseconds. EDSAC II used thermionic valves.
NPL Pilot ACE: Table 3 describes the state of the machine in December 1951. The 'number of operations' in the instruction repertoire is not easy to describe exactly, owing to the distributed internal structure of the computer as reflected in the instruction format. The figure of fifteen operations is given for purposes of comparison with more conventional machines having one-address instruction formats. The addition time could be anything from 64 microseconds to 1024 microseconds, depending on the position in the delay-line store of the next instruction. An average figure has been given.
The Pilot ACE had a complicated (2 + 1)-address instruction format which included provision for specifying one of 32 'sources', one of 32 'destinations' and the source of the next instruction. Instructions also specified the duration of a transfer, so that prolonging a transfer over several timing cycles could give the effect of shifting or multiplying operands by small integers. The instruction format permitted 'optimum coding', whereby the programmer could minimise the inconvenience of hold-ups due to the essentially sequential nature of delay line stores. He did this by suitable use of the 'next instruction source' field. During the initial design of ACE Turing was said to have been 'obsessed with speed of operation'.52 To Turing, 'optimum coding' was just 'coding'. It was said that optimum coding could achieve a speed improvement of up to four times compared with conventional delay-line computers. In the long term the development of random-access stores rendered optimum coding somewhat of a blind alley. A programming example is given in Chapter 15.
Early British Computers, Appendix 2, starting page 16
Fig. A2.1 Research on a shoe-string: the servo-synchronised magnetic drum store of the Manchester University Mark I computer in 1949. Because of its squat shape, the nickel-plated drum was referred to locally as the 'magnetic wheel'.When compared with Alan Turing's original design for ACE,12, 13 the actual Pilot ACE had a neater scheme for conditional branching. However, Turing had originally included an instruction address register and a return-link stacking/unstacking command for subroutines, and had been somewhat closer to a microprogrammed CPU design. It was not until 1958 that Dr A. M. Uttley, speaking at the inauguration of the full ACE, was able to say 'today Turing's dream has come true'.
NICHOLAS: Table 3 gives details of the computer working at the Elliott Brothers' Borehamwood establishment in December 1952. It was built in the Theory Laboratory by a team under Norman Hill and S. E. Hersom, initially for use by the laboratory for a series of trajectory calculations for a military project. NICHOLAS was based on the subminiature pentode and crystal diode circuits of the 153 project, the processor containing about 250 valves and 1500 germanium diodes.
Early British Computers, Appendix 2, starting page 117
Many of the logic boards were wired up at home in the evenings by members of the Theory Laboratory team.31 The main store was made of eight nickel delay lines, each holding 128 words. An easy-to-use symbolic assembly language was developed for NICHOLAS. For example, although there was no hardware multiply instruction as such, a programmer could call upon a multiplication macro by simply writing the symbol 'M'. (The resulting instructions made use of a special conditional shift-and-add order, and were quite fast.) The computer gave valuable service until 1958.
TREAC: Details are given in Table 3 of the machine as described in March 1953 in reference 53. At that stage the magnetic drum had not been added but plans were well advanced. The drum had a moveable 24-head assembly which, when fixed, gave one track's worth of storage (2048 digits) per head at an average access time of 20 milliseconds. If greater capacity was required, the whole head assembly could be made to oscillate, producing a spiral effective track of 32 turns for each head and a total storage capacity of 64 000 words at a mean access time of 1.25 seconds. Since the whole computer was parallel, a figure for the digit-period is not quoted. In addition to the 2000 thermionic valves, TREAC contained 1000 germanium semiconductor diodes.
MOSAIC: This machine is as described in 1953.54 The addition time could vary between 70 microseconds and 1.28 milliseconds and an average time is quoted. The paper tape input was three inches wide and came from a specially designed portable data recorder used in aircraft tracking experiments. In addition to the 6000 thermionic valves, MOSAIC contained 2000 germanium diodes.
Table 4 gives the overall characteristics of nine commercially available computers, as they existed in 1958. The information, which is in some cases only approximate, is mainly taken from reference 35. The IBM 704 is, of course, an American design, but is included for comparison. It is the fastest and most expensive computer described in Table 4.
|Early British Computers, Appendix 2, starting page 118|
|.||Mark 1||EDSAC||Pilot Ace||NICHOLAS||TREAC||MOSAIC|
|Word length, bits||40||36||32||32||24||40|
|Instruction format||1-address||1-address||(2 +1)-address||1-address||1-address||(3+1)-address|
|Instruction set||26 ops||18 ops||(15)a||47 ops||14 ops||?|
|Store size, fast||128||512||352||1024||512||1024|
|Store type, fast||CRT||delay||delay||nickel||CRT||delay|
|Store size, backing||1024||0||0||0||2048a||0|
|Store type, backing||Drum||-||-||-||Drum||-|
|Add time (average)||1.8 ms||1.4 ms||0.54 msa||12.5 us||40 us||0.67 msa|
|Multiply time (average)||10 ms||5.4 ms||2 ms||a||-||6 ms|
|Input medium||PTR||PTR||Cards||PTR||PTR||Cards or PTRa|
|Ouput medium||Tprin||Tprin||Cards||Tprin||Tprin||Cards or Tprin|
|Digit period||8.5 usa||2 us||1 us||3 us||NAa||2 us|
|Main valve type||EF 50||EF 54||ECC 81||VX8030/8046||?||CV 138|
|Approximate number of valves||1300||3000||800||250||2000||6000|
|Approximate number of Ge diodes||None||None||None||1500||1000||2000|
Notation and conventions a see text for further explanation. Instruction set: the total number of useful operations in the repertoire is given. Storage sizes: these are given in terms of full words. Storage types: `CRT' signifies Williams tube storage; `delay' signifies mercury delay lines; `nickel' signifies nickel magnetostrictive delay lines. Speeds: 1 ms is 1 millisecond; 1 Its is 1 microsecond. Input medium: `PTR' signifies 5-track paper tape reader- (3-inch-wide tape for MOSAIC); `Cards' signifies Hollerith punched cards. Output medium: `Tprin' signifies a teleprinter, which provided hard copy as well as 5-track paper tape.
|Early British Computers, Appendix 2, starting page 119|
|.||Star||DEUCE||402||1201||LEO 11||704||Pegasus||MV 950||Mercury|
|Store size, fast||416||400||17||0||1038||up to 32763||56||(8)||1024 32763|
|Store type, fast||CRT||Delay||Nickel||-||Delay||Core||Nickel||(Drum)||Core|
|Store size, backing||16384||8192||5000||1024 or 4080||up to 65536||8192 per drum||5120||4096||Up to 32768|
|Store type, backing||Drum||Drum||Drum||Drum||4 drums||Drum||Drum||Drum||4 drums|
|FXPT add time||1.2 ms||32 us minimum||204 us minimum||1.25 ms||340 us||24 us||300 us minimum||3 ms||60 us|
|FLPT add time||-||-||-||-||-||72 us||-||-||180 us|
|FXPT multiplication time||2.16 ms||2.08 ms||3.366 ms||2-50 ms||0.6-3.5 ms||228 us||2 ms||8 ms||210 us|
|FLPT multiplication time||-||-||-||-||-||192 us||-||-||300 us|
|Date first delivered||1953||1955||1955||1956||1956||1956 in UK||1956||1956||1957|
|Approximate basic cost||90||50||27||37||90||500||50||?||100|
Notation and conventions These are mostly the same as in Table 3. In addition, `core' signifies magnetic core stores; FXPT and FLPT signify fixed-point and floating-point arithmetic respectively. The `minimum' addition times refer to computers with (1-f l)-address instruction formats. On Mercury, index-register (B-line) arithmetic was faster than main accumulator arithmetic. The cost figures are in units of £1000, at 1958 prices.
|Early British Computers, APPENDIX 3, starting page 120|
In general, most early American computers were faster and contained larger stores than contemporary British ones. A greater proportion of them were parallel and most included a division order in the instruction set. There were also some similarities, one of these being the choice of about 40 bits as a popular word-length on both sides of the Atlantic.
Many of the American computers followed one of two patterns: either they were based broadly on the final Institute for Advanced Study (IAS) design, characterised by electrostatic storage, parallel operation and oneaddress instruction format; or they followed the revised EDVAC design, characterised by mercury delay-line storage, serial operation and a (3 -1-1)address instruction format. There were of course exceptions, of which the UNIVAC was the most notable - (see Table 5 below). The SEAC was also unusual in that it initially had an EDVAC delay-line store and then acquired Williams tube electrostatic storage later. The electrostatic storage of all early American computers used the British Williams tube principle,55 with the exception of the MIT WHIRLWIND computer which used a specially constructed double-gun tube designed by MIT.
The specimen stored-program computers listed in Table 5 were all considered 'large'. There were naturally many smaller ones. Notable amongst smaller machines was the Computer Research Corporation's CADAC,56 designed by a group of engineers who had been working for the Northrop Aircraft Corporation on a digital differential analyser. CADAC was remarkable for packing a 1024-word drum store, 195 thermionic valves and 2500 germanium diodes into a box about one metre cube - which was provided with wheels! CADAC used a 42-bit word, a 3-address instruction format, and had an addition time of about 55 milliseconds. The first production machine was delivered to MIT in December 1951.
Early British Computers, APPENDIX 3, starting page 121
Fig. A3.1 The BINAC computer at the Northrop Corporation in America. Apart from References 44 and 59, few details of this historic machine seem to be available in the open literature, probably because of the classified nature of its application. Designed by the Eckert/Mauchly group, it is believed to have been delivered to Northrop in September 1949.The nine large computers featured in Table 5 are arranged in approximate chronological order. Information about their characteristics mainly comes from references 4 and 8 and from appropriate papers presented at the conference cited in reference 55. Further background details are now given. Note that all the machines in Table 5 had hardware division instructions.
SEAC: 'Standards' Eastern Automatic Computer' was built in Washington DC by the American National Bureau of Standards, an organisation which in many ways serves the same purpose as the National Physical Laboratory in England. SEAC is distinguished from the somewhat later SWAC (Standards' Western Automatic Computer) built in Los Angeles. The entry in Table 5 refers to the first version of SEAC,
Early British Computers, APPENDIX 3, starting page 122
working in May 1950 and probably the first American stored-program computer actually to become fully operational. The SEAC research team continued improvements during the next three years, adding parallelaccess electrostatic storage and magnetic tape and magnetic wire.
BINAC: 'BINary Automatic Computer'. This machine was built by the company founded by J. P. Eckert and John Mauchly of ENIAC fame, for the Northrop Aircraft Corporation. It is believed to have been intended for airborne use, as part of a missile- control system. An interesting feature of BINAC was the duplication of the computational circuits and the main store, with a constant check being kept that the results of the dual calculations remained identical. If a discrepancy arose, the machine stopped. Input/output for the computer was initially under manual control. BINAC worked under test conditions in August 1949, and was shipped to Northrop in California the following month.59 It is believed never to have functioned successfully at Northrop.
ERA 1101: This computer was designed by the Electronic Research Associates Company, primarily for undisclosed military applications. It is believed that ERA built several stored-program computers for strategic applications during the period under review. The ERA 1101 was first operational in December 1950.
WHIRLWIND: The WHIRLWIND project at the Massachusetts Institute of Technology (MIT) had its origins in wartime defence contracts for real-time aircraft simulation and anti-aircraft fire control. The requirements for high-speed calculations of defined accuracy led to the use of digital techniques and, though the application was initially a specialised one, the WHIRLWIND machine described in Table 5 was a true general-purpose stored-program computer. The entry in the table refers to the first version, operational in November 1950. This used a special MIT storage tube. Magnetic tape units and a ferrite core store were added later.
UNIVAC: 'UNIVersal Automatic Computer'. This machine was the tour de force of the Eckert-Mauchly team and in size, if not in speed, was the most impressive early American computer. It was designed very much with business data-processing in mind, unlike most other contemporary machines which were scientific in flavour. UNIVAC had hardware character-handling facilities and made provision for bulk input/output
Early British Computers, APPENDIX 3, starting page 123
to magnetic tape in parallel with main computing activity. There were up to ten magnetic tape decks, called 'uniservos', using metal-backed half-inch-wide tape at a maximum transfer rate of about 21.6 Kilocharacters/second, using 60-word (720- character) fixed blocks. UNIVAC was delivered some time between March and June 1951.
ORDVAC: 'ORdnance Discrete Variable Automatic Computer'. This machine was built at the University of Illinois for the US Army's Ballistic Research Laboratories. Its general design followed that of the IAS computer at Princeton. ORDVAC used Williams tube storage and was first operational at the University of Illinois in November 1951. The later ILLIAC was very similar in design to ORDVAC.
EDVAC: 'Electronic Discrete Variable Automatic Computer'. The original 1945 proposal for this computer (see reference 10) was modified by the Moore School group in the University of Pennsylvania as time went by, in the light of available storage technology. Thus although the 1945 proposal is commonly regarded as the starting point for the design of the EDSAC, EDVAC and the IAS computer, the final products of these three design teams differed significantly. The EDVAC itself took rather a long time to be completed at the Moore School, being overtaken by nearly two years by its close derivative, SEAC. The entry for EDVAC in Table 5 refers to the machine which came into operation in April 1952.
IAS: John von Neumann's group at the Institute for Advanced Study, Princeton University, was the source of much inspiration to American computer design groups; one of the IAS-derived computers (at the Rand Corporation) was even named JOHNNIAC in recognition of this. Other computers based closely on the IAS machine were AVIDAC, ILLIAC, MANIAC, ORACLE and ORDVAC. The IAS computer featured in Table 5 was operational some time between January and June 1952; a drum store was added somewhat later.
RAYDAC: 'RAYtheon Digital Automatic Computer' was built by the Raytheon Manufacturing Company and installed at the Naval Air Missile Test Center, California. RAYDAC was unusual in having four digits in each word assigned as a check-sum, this being re-calculated and checked after each transfer. The arithmetic unit also produced a 5-bit check number for operands and result, and used these to carry out verification
Early British Computers, APPENDIX 3, starting page 124
of each computation similar to the decimal system of 'casting out nines'. An unusual feature of the RAYDAC instruction set was hardware assistance for double-length and floating-point working. The entry for RAYDAC in Table 5 describes the machine which was operational in July 1952.
|Early British Computers, APPENDIX 3, starting page 125|
|.||SEAC||BINAC||ERA 1101||Whirlwind||UNIVAC||ORDVAC||EDVAC||IAS|| RAYDAC
|| Serial/parallel || Serial|| Serial ||Parallel || Parallel || Serial|| Parallel || Serial || Parallel || Parallel
|| Word length (bits) ||45 || 31|| 24 || 16 || 84 || 40 || 44 ||40|| 366
|| Instruction length ||45|| 14 || 24 ||16||42 || 20|| 44 ||20|| 72
|| Instruction format ||(3 +1)-address || 1-address||1-address || 1-address ||1-address || 1-address || (3 +1)-address || 1-address ||(3 +1)-address
|| Main store size||512||512||16384||256||1000 ||1024 ||1024||4096 ||1024
|| Main store type || Delay ||Delay ||Drum ||CRT ||Delay||CRT|| Delay||CRT || Delay
|| Backing store type|| - || Mag. tape|| - || - ||Mag. tape || -||Mag. wire||(Drum)||Mag. tape
|| Add time (average) ||864 us|| 800 us ||96 usa || 49 us||525 us ||72 us||846 us ||62 us ||707 us
|| Multiply time (average)|| 2.98 ms ||1.2 ms||352 usa ||61 us ||2.15 ms||732 us||2.9 ms||713 ||868 us
|| Basic clock frequency || 1 MHz|| 1 MHz|| 400 KHz||1 MHz|| 2.25 MHz ||Asynch. ||997 kHz||Asynch.||4 MHz
|| Approximate number
of valves || 747||700 ||2700|| 5000 || 5400|| 2178|| 3600||2300|| 5200
|| Approximate number
of Ge diodes||10500|| ? || 2385 ||11000||18000||None ||1000 || None ||17000
Notation and conventions
- Serial/parallel: refers to the design of the arithmetic unit.
- Main store type: `delay' signifies mercury delay lines; `CRT' signifies Williams tubes, except in the case of WHIRLWIND.
- Clock frequency: ORDVAC and IAS were asynchronous computers, having no basic clock.
- Ge diodes: these are germanium semiconductor diodes (`crystal diodes').
- a The arithmetic times quoted for the ERA 1101 are minimum times; since the drum period was 10 milliseconds, maximum times were very long.
- b The RAYDAC 36-bit word included four `transfer-count' check digits.
|Early British Computers, BIBLIOGRAPHY AND REFERENCES, starting page 126|
The serious enquirer into early British computers will get a very good idea of the spirit of the age by reading the proceedings of the first four major computer conferences. These were held respectively at the Royal Society in London in March 1948, the University of Cambridge in June 1949, the University of Manchester in July 1951, and at the National Physical Laboratory in March 1953. The proceedings of the first event were published in 1948 as A discussion on computing machines, Proceeding of the Royal Society, 195A. Publication details of the other three are given below in references 19, 20 and 23. If a league table were to be constructed of the best-known British computer pioneers, it could probably be based on the number of times a particular individual appeared as author of a contribution to these four famous conferences. A fifth computer conference, held at the Institution of Electrical Engineers in London in April 1956 (see reference 26), describes amongst other things the commercial manifestation of many of the original research projects. It might thus be taken as signalling the end of the 'vintage' era of British computer design.
For more general reading, an excellent account of most early computer projects is given in B. V. (later Lord) Bowden's book Faster Than Thought (see reference 16 below). Lord Bowden is often referred to as the first computer salesman. A retrospective view by several eminent pioneers is provided by the collection of papers appearing in the July, August and October 1975 issues of the journal Radio and Electronic Engineer (see reference 18 below). From the historian's view these retrospective papers are sometimes disappointing, being a little short on hard facts and, in one or two places, a trifle inaccurate. Perhaps their greatest value is that they enable the modern reader to assess the personal philosophy and priorities of each pioneer. For the technical details there is no substitute for going back to the original reports, where these still exist.
Computer history started to become fashionable as a serious area of research in about 1975. In recent years a number of analytical articles have appeared in the journals (for example references 2, 6, 43 and 57). Such articles can be very valuable for interpreting long-obsolete terminology and for placing events in their scientific (if not social) context. For the latter, the London Science Museum has produced a series of archival tape- recorded interviews entitled 'Pioneers of Computing' which is very helpful. Finally, for those wishing to investigate the pre-1945 history of calculating machines, many original papers for the period 1834-1949 are reprinted in Professor Randell's book (see reference 10). This useful collection includes papers which are difficult to obtain, such as an account by Charles Babbage of his analytical engine.
|Early British Computers, REFERENCES, starting page 127|
- Morrison, P. & Morrison, E. (eds). Charles Babbage and his Calculating Engines. Dover, 1961.
- Wilkes, M. V. Babbage as a computer pioneer. In Proceedings of the Babbage Memorial Meeting, 1971 (British Computer Society, 1972). Reprinted in Historia Mathematica, 4, 415-40, 1977.
- Crank, J. The Differential Analyser. Longmans, 1947.
- Goldstine, H. H. The Computer from Pascal to von Neumann. Princeton University Press, 1972.
- Johnson, B. The Secret War. BBC Publications, 1978.
- Randell, B. The Colossus. University of Newcastle Computer Science Technical Report 90, 1976. Reprinted in condensed form in New Scientist, 73, 341-8, 1977.
- Kilburn, T. A storage system for use with binary digital computing machines. Dept of Electrotechnics, University of Manchester, 1 December 1947. Later published (but without the section on a hypothetical computer) in Williams, F. C. & Kilburn, T., Proceedings of the IEE, 96, Part 2, 183-202, 1949.
- A Survey of Automatic Digital Computers, US Dept of Commerce, Office of Technical Services, Report PB111293, 1953.
- Lavington, S.H. A History of Manchester Computers. National Computing Centre Publications, 1975.
- von Neumann, J. Report on the EDVAC; mimeographed June 1945. Later incorporated in Burks, A. W., Goldstine, H. H. & von Neumann, J. Preliminary Discussion of the Logical Design of an Electronic Computing Instrument, Institute for Advanced Study, Princeton, June 1946. Reprinted in Randell, B. The Origins of Digital Computers, Springer-Verlag, 1973.
- Turing, A. M. On computable numbers, with an application to the Entscheidungsproblem. Proceedings of the London Mathematical Society, Series 2, 42, 230-65, 1936. Corrigenda in 43, 544-6.
- Turing, A. M. Proposals for the development in the Mathematics Division of an Automatic Computing Engine (ACE). Report E882, Executive Committee, NPL, February 1946. Reprinted April 1972 as NPL Report Com. Sci 57.
- Carpenter, B. E. & Doran, R. W. The other Turing machine. Computer journal, 20 No. 3, 269-79, August 1977.
- National Physical Laboratory, Executive Committee minutes for Tuesday 21 January 1947.
- Smith, R. A. Notes on a visit to the NPL to discuss the Automatic Computing Engine with the Director. THE internal memo D.4070, 25 November 1946.
- Bowden, B. V. Faster Than Thought: A Symposium on Digital Computing Machines. Pitman, 1953. (Contains useful material on most early British computers.)
- Elliott, W. S. The present position of automatic computing machine development in England. In Proceedings of the 2nd Harvard Symposium on Large-Scale Digital Calculating Machines, September 1949, pp. 74-80. (Published 1951 as Annals of the Computation Laboratory of Harvard University, 26.)
- Wilkes, M. V. Early computer developments at Cambridge: the EDSAC. The Radio and Electronic Engineer, 45, July 1975, 332-5.
- Wilkes, M. V. The EDSAC. In Report of a Conference on High-Speed Automatic Calculating Machines, Cambridge University, ,June 1949, pp. 9-11, 1950. Reprinted by the Computer Laboratory, University of Cambridge, 1977.
- Williams, F. C. & Kilburn, T. The University of Manchester computing machine. In Inaugural Conference of the Manchester University Computer, July 1951, pp. 5-11. (Also presented at the Joint AIEE/IRE Computer Conference, Philadelphia, December 1951.)
- Knuth, D. E. & Pardo, L. T. The early development of programming languages. In Report STAN-CS-76- 562 from Computer Science Dept, Stanford University, August 1976, pp. 41-7.
- Kilburn, T., Edwards, D. B. G. & Thomas, G. E. The Manchester University Mark 2 digital computing machine. Proceedings of the IEE, 103 Part B, Supp. 1-3, 247-G8, 1956.
- Wilkinson, J. H. The Pilot ACE. In Automatic Digital Computation (Proceedings of a Symposium held at the NPL, March 1953), HMSO, 1954. (Reprinted in Bell & Newell, see reference 28 below.)
- Woodger, M. The history and present use of digital computers at the National Physical Laboratory. Process Control and Automation, November 1958, 437-43.
- Felker, J. H. Performance of TRADIC transistor digital computer. In Proceedings of the Eastern Joint Computer Conference, Philadelphia, December 1954, pp. 46-8.
- Kilburn, T., Grimsdale, R. L. & Webb, D. C. A transistor digital computer with a magnetic-drum store. Proceedings of the IEE, 103B, Supp. 1-3, 390-406, 1956.
- Cooke-Yarborough, E. H., Barnes, R. C. M., Stephen, J. H. & Howells, G. A. A transistor digital computer. Proceedings of the IEE, 103B, Supp. 1-3, 364-70, 1956.
- Kilburn, T., Edwards, D. B. G., Lanigan, M. J. & Sumner, F. H. One-level storage system. IRE Transactions on Electronic Computers, EC-11, No. 2, 223-35, April 1962. (Reprinted in Bell & Newell, Computer Structures, McGraw-Hill, 1971.)
- Coombs, A. W. M. An electronic digital computer, Parts 1-4. Post Office EEJ, 48, 114, 137, & 212, July & October 1955 & January 1956; 49, 18 & 126, April & July 1956. (Summary information also given in Automatic Digital Computation, pp. 38-42, see reference 54 below.)
- The Telecommunications Research Establishment parallel electronic digital computer. Chapter 10 in Faster Than Thought. (See reference 16, above.)
- Clarke, S. L. H. The Elliott 400 series and before. The Radio and Electronic Engineer, 45 No. 8, 415- 21, August 1975.
- Booth, A. D. Relay computers. In Report of a Conference on High-Speed Automatic Calculating Machines, Cambridge University, June 1949, pp. 17-21, 1950. Reprinted by the Computer Laboratory, University of Cambridge, 1977.
- Lavington, S. H. An evaluation of the ARC project, Department of Computer Science, University of Manchester, Internal Report, May 1979.
- Booth, A. D. The APE(X)C: a low-cost electronic calculator. In Automatic Digital Computation (Proceedings of a symposium held at the NPL, March 1953.) HMSO, 1954.
- Vickers, T. Table comparing some digital computers available in Britain. Process Control and Automation, November 1958, 460.
- Pinkerton, J. M. M. & Kaye, E. J. LEO -Lyons Electronic Office (part 1). Electronic Engineering, 29, 284-91, 1954. Part 2 (entitled Operation and maintainance by Lanaerts, E. H.) 29, 335-41. Part 3 (entitled A checking device for punched data tapes by Kaye, E. J. & Gibbs, G. R.) 29, 386-92.
- Haley, A. C. D. The inconspicuous computer. The Radio and Electronic Engineer, 45, 409-10, August 1975.
- Haley, A. C. D. DEUCE: a high-speed general-purpose computer. Proceeding of the IEE, 103B, Supp. 1-3, 165-73, 1956.
- Allmark, R. H. & Lucking, J. R. Design of an arithmetic unit incorporating a nesting store. Proceedings of the IFIP Congress, Munich, 1962, pp. 694-8. (Reprinted in Bell & Newell, see reference 28.)
- Davis G. M. The English Electric KDF9 computer system. Computer Bulletin, December 1960, 119- 120.
- Elliott, W. S., Owen, C. E., Devonald, C. H. & Maudsley, B. G. The design philosophy of Pegasus, a quantity production computer. Proceedings of the IEE, 103B, Supp. 1-3, 188-96, 1956. (Reprinted in Bell & Newell, see reference 28.)
- Swann, B. B. An informal history of the Ferranti Computer Department, 1975. (Circulated privately.)
- Campbell-Kelly, M. A series of papers on early British programming systems (EDSAC, Manchester Mark I, etc.) to appear in the Annals of the History of Computing, a quarterly journal published by the American Federation of Information Processing Societies.
- Auerbach, A. A., Eckert, J. P., Shaw, R. F., Weiner, J. R. & Wilson, L. D. The Binac. Proceedings of the IRE, 12-29, January 1952.
- Kilburn, T. The Manchester University digital computing machine In Report of a Conference on High- Speed Automatic Calculating Machines. Cambridge University, June 1949, pp. 119-21. Reprinted by the Computer Laboratory, Cambridge University, 1977.
- Newman, M. H. A. Some routines involving large integers. In Report of a Conference on High-Speed Automatic Calculating Machines, Cambridge University, June 1949, pp. 69-70. Reprinted by the Computer Laboratory, Cambridge University, 1977.
- Brooker, R. A. An attempt to simplify coding for the Manchester electronic computer. British Journal of Applied Physics, 6, 307-11, September 1955.
- Goldstine, H. H. & Goldstine, A. The Electronic Numerical Integrator and Computer (ENIAC), MTAC (now Mathematics of Computation) 2, No. 15, 97-110, 1946. (Reprinted in Randell, see reference 10 above.)
- Crawley, H. J. The National Research Development Corporation Computer Project. NRDC Computer Sub-Committee Paper 132, February 1957.
- The National Computer Index, maintained by the National Computing Centre. (Data for the early years compiled by Derek Pedder.)
- Renwick, W. EDSAC II. Proceedings of the IEE, 103B, Supp. 1-3, 204, 1956.
- Wilkinson. J. H. The Pilot ACE at the National Physical Laboratory. The Radio and Electronic Engineer, 45, 336-40, 1975.
- Carter, R. H. A. The TRE high-speed digital computer. In Automatic Digital Computation (Proceedings of a Symposium held at NPL, March 1953), pp. 56-64. HMSO, 1954.
- Coombs, A. W. M. MOSAIC - the Ministry of Supply Automatic Computer. In Automatic Digital Computation, (Proceedings of a symposium held at NPL, March 1953), pp. 38-42. HMSO, 1954.
- Forrester, J. W. Digital computers: present and future trends. In Review of Electronic Digital Computers, a joint AIEE/IRE Computer Conference held at Philadelphia, December 1951, pp. 109-13. (This conference also contained papers on UNIVAC, ORDVAC, ERA 1101, WHIRLWIND and SEAC.)
- Sprague, R. E. The CADAC. In Proceedings of a symposium on commercially available general purpose electronic digital computers of moderate price, Washington, May 1952, pages 13-17. (Sponsored by the Navy Mathematical Computing Advisory Panel.)
- Lavington, S. H. The Manchester Mark I and ATLAS: a historical perspective. Communications of the ACM, 21, 4-12, January, 1978.
- Denison, S. J. M. Further DEUCE interpretative programs and some translating programs. In Annual Review in Automatic Programming, ed. R. Goodman, vol. 1, pp. 127-45, Pergamon, 1960. GEORGE was implemented by C. L. Hamblin; see references in his paper Translation to and from Polish notation, Computer journal, 5, No. 3, 210-13, 1962.
- Stern, N. The BINAC: a case study in the history of technology. Annals of the History of Computing, 1, No. 1, 9-20, July 1979.
- Barton, R. S. Programming languages and computer design: a case history. In High-Level Languages, Infotech State of the Art Report No. 7, pp. 363-74. Infotech Information Ltd, 1972.
|Early British Computers, ACKNOWLEDGEMENTS, starting page 131|
The active encouragement of the Science Museum, South Kensington, London is acknowledged in the preparation of this book. Thanks are due to Professor Brian Randell for his helpful comments on the manuscript. The author is indebted to many people for their personal recollections. Particular mention should be made of B. Bellringer, S. L. H. Clarke, Dr A. W. M. Coombs, H. J. Crawley, L. Dilger, Professor W. S. Elliott, A. C. D. Haley, S. E. Hersom, Dr S. H. Hollingdale, A. St Johnston Professor Tom Kilburn, D. Pedder, Dr J. M. M. Pinkerton, C. J. Somers, Professor A. M. Uttley, Professor Maurice Wilkes, Dr J. H. Wilkinson, and M. Woodger. Notwithstanding their willing assistance, the responsibility for the text rests finally with the author. It will also be appreciated that the recording of 'recent history' is not an exact science, especially where it impinges on personalities and national security!
|Early British Computers, PICTURE CREDITS, starting page 132|
- Bassano & Vandyk Studios, London: Figure 8.1
- S. L. H. Clarke: Figures 11.1, 11.2, 11.3
- Professor A. J. Colin: Figure 12.1
- Dept of Computer Science, University of Manchester: Figures 2.4, 4.1, 4.2, 4.3, 4.4, 4.5, 4.7, 7.1, 7.2, 7.4, 9.1, 9.2, 9.3, 9.4, 14.1, 15.1, 15.3, 15.4, A2.1. (With thanks to Mike Koiston, photographer.)
- Ferranti Limited: Figures 7.3, 7.5, 14.2, 15.2
- R. Jordeson, University of Manchester: Figure 2.3
- National Physical Laboratory (Crown Copyright): Figures 4.6, 12.2, 12.3, 13.2, cover photo.
- National Research Development Corporation (H. J. Crawley): Figure 17.1
- Dr J. M. M. Pinkerton: Figures 6.3, 13.1
- Post Office Research Centre, Martlesham Heath: Figure 10.1
- Public Record Office (Crown Copyright): Figures 3.1, 3.2
- Science Museum, London (Crown Copyright): Figures 1.1, 2.1, 2.2, 5.2, 13.2, 16.1, A3.1, cover photo.
- Sperry Univac Computer Systems: 16.2
- United Kingdom Atomic Energy Authority, Harwell, (R. C. M. Barnes): Figure 12.4
- Professor A. M. Uttley: Figure 10.2
- Professor M. V. Wilkes, University of Cambridge: Figures 6.1, 6.2, A1.1
- M. Woodger, National Physical Laboratory: Figure 8.2
|Early British Computers, INDEX, starting page 133|
152 and 153 fire-control systems, 57-8, 116 (2+1)-address instruction format, definition of, 110; examples of, 92, 115, 118 accumulator register, definition of, 109-10 ACE (Automatic Computing Engine), original proposals for, 25-30, 43, 44-6, 116; final computer, 46, 116; pilot model, see Pilot ACE acoustic delay lines, see mercury delay lines address, basic concepts of, in computers, 107, 109-10 Admiralty, 32, 56, 58; Signals Establishment, 32 aircraft, computers applied to, 8, 53, 66-7, 122 All-Power Transformer Co., 53 Allmark, R. H., 76 Allway, G. G., 46 analogue computers, 56, 66 Analytical Engine, see under Babbage anticipation pulse effect, 19 APE(R)C computer, 28, 62-4 ARC (Automatic Relay Computer), 62, 65 assembly language, 33, 90, 117 Atanasoff, J. V., 7 ATLAS computer, 16, 37, 51, 52, 81, 83-5 Atomic Energy Authority (UKAEA), Harwell, 24, 49, 65, 67 autocode of Glennie, 41; Mark I, 42, 95 AVIDAC computer, 123
B-lines, see index registers Babbage's, Charles (1791-1871), 2, 126; Babbage Analytical Engine, 2 Barnes, R. C. M., 65 barrier grid storage tube, 18, 100 Barton, S. A., 31 Baudot code (teleprinter code), 9; see also teleprinter Bell Telephone Laboratories, 14, 48, 49; calculators 98 Bennett, J., 31 Berry, C., 7 BINAC computer, 92, 94-7, 100, 121, 122,125 binary number system, explanation of, 108 Birkbeck College, University of London 24, 62-4, 85, 103 bit, definition of, 9, 108 Blackett, P. M. S. (later Lord Blackett), 38, 39 Bletchley, see Government Code and Cipher School, Bletchley Booth, A. D., 62-5, 85 Booth, S. J., 63 Borehamwood Laboratories, Elliott Brothers, 24, 57- 9, 116 Bowden, B. V. (later Lord Bowden), 126 British Computer Society, 104 British Rayon Research Association, 62 British Rubber Producer's Research Association, 62 British Tabulating Machine Co. (BTM), 63, 64, 69, 73, 81, 83-5, 103; 1200 series computers, 64, 82, 85; 1201 computer, 64; 1300 series computers, 86 Britten, Miss Kathleen, 62 BTM, see British Tabulating Machine Co. Brooker, R. A., 42, 51, 91 Brunsviga calculators, 4 Brunt Committee, 50 Burroughs Corporation, 76; B5000 computer, 76 Bush, Vannevar, 5 CADAC computer, 100, 120 Cadby Hall (J. Lyons Co., London), 24, 68, 71, 72 CADET computer, 49 calculators, electro-mechanical, 4, 6, 23, 98 Cambridge University, 2, 5, 23, 24, 26, 29-30, 31-4, 53, 60, 68-70, 104, 113, 115, 126; EDSAC computer, see EDSAC; Mathematical Laboratory, 29, 34 cards, see punched cards cathode ray tube stores, 17-19, 26-7, 36, 114, 118, 119 CDC 6600 computer, 81 central processor, description of, 106, 109-11 chip, silicon (integrated circuit), 12, 15-17, 49 Chisholm, K., 75 Coales, J. F., 57 Cockroft, Sir John, 52 code deciphering, use of computers for, 8-11, 53 COLOSSUS, 8-12, 23, 53; Mark II, 11 compilers, 41; definition of, 112 Computer Research Corporation, 120 Comrie, L. J. (1893-1950), 6, 23 conditional branching, 11, 111, 116 Cooke-Yarborough, E. H., 65 Coombes, A. W. M., 23, 25, 26, 47, 53 core store, principle of, 21-2; computer use of, 100, 115, 119, 122 Coventry Gauge & Tool Co., 35, 71 CPU (central processing unit) description of 106, 109-111 Crawley, H. J., 103 crystal diode, definition of, 14; see also diode, semiconductor technology Darwin, Sir Charles Galton (1887-1962) Director of NPL from 1938, 25-7, 29 Davies, Donald, 26 decatron valve, description of, 13; application of, 65-6 delay line stores, general principles of 17-18, 21, 36; applied to computers 17, 27, 71, 93-4, 115, 118-19; see also mercury, nickel Delpht University, Holland, 66 Department of Atomic Energy, 27-8 Department of Scientific and Industrial Research (DSIR), 27, 46 DEUCE computer, 17, 19, 47, 66, 74-G, 79, 92, 119 differential analyser, 5-7; electronic, 66; meccano, 6; digital, 120 digital computer, principles of, 1, 106-12 Digital Equipment Corporation, 61 Dilger, L., 66 diode, semiconductor, description of, 14-15; use of, 53, 116-18, 125; thermionic, description of, 13-15 disc, see magnetic disc stores drum, see magnetic drum stores Eckert, J. Presper, 98, 99, 100-101, 121, 122 Eckert-Mauchly Computer Corporation, 99 EDSAC computer, 18, 28, 29, 31-5, 44, 53, 68-70, 76, 90, 94- 7, 115, 118, 123; EDSAC 11, 34, 113, 115 EDVAC computer, 32, 99, 100, 123, 125; report 24, 26, 46, 95, 98, 99, 120, 123 Edwards, D. B. G., 37, 40, 51 Electronic Research Associates (ERA), 122; see also ERA 1101 computer electrostatic stores, general principles of, 17-19, 21; applied to computers, 17, 19, 36, 100, 120, 122; see also Williams tubes, Selectron Elliott Automation (company), 77 Elliott Brothers (manufacturing company), 18, 56-61, 84, 102, 104, 116; 400 series computers, 57; 401 computer, 58, 60, 79, 102, 104; 402 computer, 60, 62, 82, 119; 405 computer, 60, 61; 800 series computers, 61, 85; 802 computer, 61; 803 computer, 52 Elliott, W. S., 58, 60, 79-80 EMI (Electrical and Musical Industries Ltd), 44, 84, 102; EMIDEC 1100 computer, 52, 103; 2400 computer, 103 English Electric Co., 47, 68, 74-7, 84, 103 English Electric Leo Computers Ltd., 74, 77 English Electric Leo Marconi Computers Ltd., 77 English Electric Computers (company), 77 'English Electric' computers, see DEUCE, KDF9 etc., System 4 ENIAC, 3, 23, 98-9 Enigma codes and machines, 8-11 ERA 1101 computer, 100, 122, 125 Farmer, P., 31 Farnborough, tee Royal Aircraft Establishment Ferranti Ltd., 38, 39, 41, 51, 78-86, 102, 104; ARGUS computer, 81, 82, 85; ATLAS computer, 16, 37, 51, 52, 81, 83-5; FP6000 computer, 81, 86; Mark I computer, 16, 19, 39-43, 61, 78, 81, 91, 93, 104, 114; Mark I Star computer, 39-40, 78, 102, 119; MERCURY computer, 43, 78, 119; ORION computer, 81, 83-G; Packaged Computer, 79; PEGASUS computer, 17, 57, 60, 78-82, 86,102,104,119; PERSEUS computer, 78; POSEIDON computer, 83; SIRIUS computer, 52, 85 Ferranti, Sebastian de (1864-1930), 78 Ferranti-Packard Company (Canada), 86; FP6000 computer, 86 flip-flop (bistable circuit), description of, 16-17 floating-point arithmetic, 43, 115, 119, 124 Flowers, T. H. (Tommy), 11, 23, 25, 26, 47 Forrester, J. W., 21, 100 Fort Halstead, 40-41 Fortran, 89, 112 FPCl (Ferranti Packaged Computer), 79 Geheimschreiber codes and machines, 8-11, 42 General Electric Co. Ltd. (GEC), 84, 86 GEORGE (General Order Generator), 76 Gill, S., 34 Glennie, Alec E., 40-41, 91 Gold, T., 32 Goldstine, H. H., 35, 70, 99 Government Code and Cipher School, Bletchley Park, Buckinghamshire, 8-11, 23-5, 42, 47, 53 GPO (General Post Office) see Post Office Grimsdale, R. L., 48 guided weapons, computers applied to, 38, 53, 66, 122, 123 Haley, A. C. D., 74, 76 Halsbury, Lord, 50 hardware, general definition of, 86, 111 HARRIAC computer proposal, 86 Hartree, Douglas R. (1897-1958), 5-6, 23, 29, 34, 70, 104; wife of, 26 Harvard University calculators, 98 Harwell, tee Atomic Energy Authority de Havilland Propellers Ltd., 35 HEC (Hollerith Electronic Computer), 63, 64 Hersom, S. E., 116 high-level programming languages, 95, 112; see also autocode, Fortran Hill, Norman, 116 holding-beam storage tube, 18 Hollerith, Herman, 4, 64 Hollerith punched-card equipment, 44, 63 Hollingdale, S. H., 65 Hopper, Grace, 26 Howarth, David, 51 hybrid computers, 66 IAS see under Princeton University IBM Corporation, 84, 102, 103-4; 701 computer, 100, 101, 103; 704 computer, 117, 119; card-programmed electronic calculator, 98; selective-sequence electronic calculator, 98; STRETCH computer 51; System/360, 370 series 77, 82 ICCE computer, 65-G ICL (International Computers Ltd), 77, 84-G; 1900 series computers, 80, 81, 82, 85-6; 2900 series computers, 86; System 4 computers, 77 ICT (International Computers & Tabulators), 77, 83- 6; 1500 series computers, 85, 86; 1900 series, see under ICL ILLIAC computer, 123 Illinois University, 123 Imperial College, University of London 24, 65-6 index registers, principle of, 111; in computers, 37, 38, 56, 81, 95-7, 114, 119 Institution of Electrical Engineers (London), 126 Iowa State College, 7 Jacquard loom, 2 JOHNNIAC computer, 123 Johnson, H. (of Ferranti Ltd), 86 KDF6 computer, 76; KDF7 computer, 75; KDF8 computer, 76; KDF9 computer, 76-7, KDN2 computer, 75; KDP10 computer, 76 Kelvin, Lord (William Thomson), 5 Kidsgrove, English Electric factory, 24, 74, 76 Kilburn, Tom, 26, 28, 36, 37, 39, 40, 41, 43, 48, 50-2, 86, 88 Lanigan, M. J., 52 LARC computer, 50, 51 Lenaerts, E. H., 70 LEO computer, 28, 33, 35, 68-73; LEO Computers Ltd., 35, 74, 84; LEO II, 35, 74, 119; LEO 111, 74; LEO Chronicle, 65, 69--73 Lincoln Laboratory, MIT, 49 Lockspeiser, Sir Ben, 38, 39 London University, 62, 64, 65 Lonsdale, Keith, 41 Lyons, J., Co. Ltd., 33, 35, 68-74, 104 machine-code (programming), 89-94, 96, 112 McPherson, J. C., 103 MADM, see Manchester Mark I magnetic disc stores, general principles, 21; in computers 57-8, 60 magnetic drum stores, general principles, 20-1; in computers, 37, 48, 50, 56, 62-6, 74, 80, 91, 97, 98, 114, 116, 117, 118-19, 120, 123, 125 magnetic film stores, general principles, 21; in computers 60 magnetic tape stores, general principles, 21; in computers, 35, 69, 74, 80, 101, 103, 122, 123, 125 magnetic wire store 122, 125 magnetostrictive delay lines, tee nickel delay lines Malvern, Worcestershire (site of TRE), 8, 24, 53-4 Manchester Mark I computer (MADM), 28, 37-40, 43, 51, 56, 90-92, 94-7, 114, 116, 118; prototype (1948) or 'baby machine', 36, 114 Manchester Mark II, see MEG Manchester University, 3, 5, 23-5, 27-30, 36-42, 48- 52, 78, 83, 86, 104, 126; experimental transistor computer 48-50; see also ATLAS, MU5, MUSE MANIAC computer, 100, 123 Marconi Co., 77, 84 MARK 1, see Ferranti Mark I or Manchester Mark I Marks, Cecil, 26 Massachusetts Institute of Technology (MIT), 21, 49, 100, 120, 122; see also WHIRLWIND Mauchly, John W., 98, 99, 100-101, 121, 122 MEG computer, 43, 48 memory, see store MERCURY computer, see Ferranti MERCURY mercury delay lines, 17-18, 25, 32, 44, 53, 74, 98, 99, 101, 120, 125; see also delay line store Mersenne prime numbers, 37 Metropolitan-Vickers Co., 48, 51 Michaelson, S., 65 microcomputer, 90 microprogram, 34, 94, 111, 113, 116 microsecond, definition of, 13, 107 millisecond, definition of, 13, 107 minicomputer, 61 Ministry of Supply, 23, 35, 53, 54, 72, 102, 104 missiles, computers applied to, see guided weapons MIT, see Massachusetts Institute of Technology modular circuit techniques (packaging), 57, 58, 60- 61, 79-80 Moore School of Electrical Engineering, University of Pennsylvania, 23, 25-6, 98-100, 123 morphogenesis, 30, 93 MOSAIC computer, 23, 28, 53-4, 114, 117, 118 MRS5 real-time fire control system, 57, 60 MU5 computer (Manchester University), 16,86 MUC (Manchester University Computer), 37, 42 MUSE computer, 50, 51-2 MV950 computer 48, 51, 62, 119 National Bureau of Standards (America), 121; see also SEAC, SWAC National Cash Register Co. (NCR), 84 National Computer Index, 105 National Computing Centre, 85 National Physical Laboratory (NPL), 23-30, 43-7, 53, 68, 74-5, 103, 104, 121, 126; Electronics Division, 44; Mathematics Division, 23, 26, 29, 44 National Research Development Corporation (NRDC), 40, 50, 58, 60, 79, 100, 101,102-4 Naval contracts (British), 57-58 Nelson, Sir George (later Lord Nelson), 74 Neumann, John von (1903-1957), 23, 25, 62, 95, 99, 123 Newman, E. A. (Ted), 44, 46, 74 Newman, M. H. A. (Max), 11, 23, 24, 26, 29, 37 NEWT computer, 86 NICHOLAS computer, 28, 57-9, 116-17, 118 nickel delay lines (magnetostrictive), 17-18, 57-8, 80, 117, 118-19; tee also delay line stores Nieman, H. W., 5 Northrop Aircraft Corporation, 120, 121, 122 Norwegian Defence Research Establishment, 43 NPL, tee National Physical Laboratory one-address instruction format, explanation of, 109- 10; example of, 89-90 Owen, C. E., 57 optimum programming, principles of, 94; use of, 79, 115-16 ORACLE computer, 123 ORDVAC computer, 100, 123, 125 paging 19,52 paper tape, use of, 9, 34, 106; equipment 9, 33, 37, 53, 80, 81, 89, 118 parallel computers, definition, 108; examples, 54-5, 56, 62, 117, 120, 125 parity-bit, 80 patents 37, 103-4 PDP/8 computer, 61 PEGASUS computer, see Ferranti PEGASUS Pennsylvania University, 23, 25-6, 29, 98, 123; see also Moore School pentode valve, description of, 13, 14 Petherick, E. J., 65 Philco Corporation, 49 Physical Society Exhibition 58 Piggott, R., 31 Pilot ACE, 28, 29, 44-7, 74-5, 92-4, 114, 115-16, 118 Pinkerton, J. M. M., 35, 70, 72 Plessey Co., 66 van der Poel, W. L., 66 point-contact transistor, 15, 48, 49 Pollard, Brian, 41 Post Office Research Station (Dollis Hill, London), 8, 11, 25-7, 47, 53-4 Powers, James, 4 Powers-Samas Accounting Machines Ltd., 84 Princeton University, 23-5, 35, 62, 70, 98, 99; Institute for Advanced Study (IAS), 99, 120, 123; IAS computer, 100, 123, 125 Prinz, D. G., 38 processor (and CPU), description of, 106, 109-11 programming systems, 33-4, 87-97, 112, 117; see also assembler, autocode, highlevel language, optimum programming, subroutine punched cards, use of, 2, 94, 106; equipment 4-6, 44, 69, 73, 75, 81, 84-5, 102, 118 Queen's University, Belfast, 5 radar, computer techniques in, 8, 53, 58 Radio Corporation of America, see RCA Rand Corporation, 123 random access, principle of, 36, 37 RASCAL computer, 66 RAYDAC computer, 100, 123-5 Raytheon Manufacturing Co., 123 RCA, 24, 76-7, 99-100; 301 computer, 86; 501 computer, 76; SPECTRA computer, 77 register, definition of, 109-11 relays, principle of operation, 13-14; applied to computers, 11, 63, 65-G, 98 Renwick, W., 31 Robinson, A. A., 40 Rothamstead Experimental Station, 60 Royal Aircraft Establishment, Farnborough, 5, 24, 65-1, 74 Royal Signals and Radar Establishment, 8 Royal Society, 45, 126 Science Museum, London, 46, 126 Scientific Computing Service Ltd., London, 6, 23 SEAC computer, 100, 120, 121-2, 123, 125 SEC (Simple Electronic Computer), 62 SECA computer, 66-7 SEDA computer, 66-7 selectron storage tube, 18, 23-4, 99-100 semiconductor technology, definitions, 13-16, 22; see also diode sequence-controlled calculators, 7, 62, 65 serial computers, basic definition of, 108 Sharpless, T. K., 99 Smiths Aircraft Instruments Ltd., 66 Smith, R. A., 26-7 software, general definition of, 86, 111-12 St. Johnston, A. (of Elliott Brothers), 58 Standard Telephones & Cables Ltd., 66, 69, 71-3 Stantec ZEBRA, .see ZEBRA stack, concept of, 76 Stevens, G. J., 31 storage technology 16-22; terminology 107-8 store (or memory), basic concept, 106-108; see also core, delay line, electrostatic, magnetic disc, etc. stored-program computer, definition of, 1; basic operation of, 106-10 Strachey, Christopher, 79, 81, 104 STRETCH computer, 50, 51 SWAC computer, 121 subroutine libraries, 34, 87, 95, 112 subroutine-calling mechanisms, 95, 116 Sydney University, Australia, 76 System 4 computer, 77 tape, see magnetic tape or paper tape Telecommunications Research Establishment (TRE), 8, 24-9, 36, 37, 54-6; see also Malvern teleprinter, computer applications of, 9, 11, 33, 37, 42, 66, 90, 118 thermionic valves, principle of operation, 13- 14; applied to computers, 11, 16, 33, 37, 40, 44, 46, 52, 53, 57, 62, 63, 65, 78, 114-19 Thomas, G. E. (Tommy), 37, 40 Thompson, T. Raymond, 26, 35, 69, 70, 72, 104 Thomson, James (1822-1892), 5, 7 three-address instruction format, explanation of, 109 Tocher, K. D., 65 Tootill, G. C., 36, 39 Toronto University, 104 TRADIC computer, 48 TRANSAC S-1000 computer, 49 transistor computer, experimental, Manchester 48-50 transistors, description of, 14-16; application to computers, 48-52, 61, 84, 86, 103, 119 TRE, see Telecommunications Research Establishment TREAC computer, 28, 54-56, 117, 118 Turing, Alan M., 10, 23, 25, 28-30, 42, 43, 44-6, 93, 115-16 two-address instruction format, definition of, 110 two-plus-one address format, definition of, 110; examples of, 92, 115, 118 TX-0 computer, 49 ultrasonic delay lines, see mercury delay lines UNIVAC Corporation, 51, 84; UNIVAC computer 100-101, 120, 122-3, 125; LARC computer, 51 universal computer, definition of, 1 Uttley, A. M., 26-8, 54, 116 vacuum tubes, see thermionic valves valves, see thermionic valves virtual storage 19, 52 Wayne Kerr Laboratories Ltd., 35, 71 Wheeler, David J., 26, 31, 34 WHIRLWIND computer, 100, 120, 122, 125 Wilkes, Maurice V., 26, 29, 31-5, 44, 70, 113 Wilkinson, J. H., 26, 44, 46, 74, 93 Williams, Sir Frederic C., 26-8, 36, 37, 39, 40, 43, 91, 103 Williams tubes, 17-19, 21, 36, 37, 55-7, 100, 114, 118, 120, 123, 125 WITCH computer, 67 Wolverhampton College of Technology, 67 Womersley, J. R., 29 word (computer), definition of, 33, 107-8 Z3 computer, 7 ZEBRA computer, 66 zero-address computers, 76 Zuse, Konrad, 7, 26; KG (manufacturing company), 7
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