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Evans & Sutherland Computer Division (ESCD)
Jean-Yves Leclerc was unable to find funding for a supercomputer project in Europe, so he came to
the US to raise funding and interest. Dave Evans of Evans & Sutherland had been Leclerc's mentor
during his graduate studies in the US, and Leclerc succeeded in persuading Evans & Sutherland to
create a new division to build high-performance computers. The business logic was that many E&S
customers were using Cray machines in conjunction with E&S graphic, and that a machine
specifically tailored to the needs of visual simulation and seamlessly integrated with E&S graphics
capabilities would find a ready market.
The machine was code-named "Orca", and was to be sold as the ES-1.
The project kicked off in 1986, and folded in January 1990.
Architecture
The ES-1 had a two-level crossbar interconnect. At the first level, up to 16 processors were
connected to up to eight memory cards. Second-level interconnect would have allowed up to 128
processors in a system, all sharing memory, albeit with some pretty daunting memory delays.
Each processor was in fact called a "functional unit" or "compute unit", and a card-cage populated
with 16 of these CUs was referred to as a "processor" in ESCD terminology. This allowed favorable
per-"processor" performance comparisons with other supercomputers!
The integer/control portion of the CPU had an instruction set that emphasized latency tolerance.
Up to 8 integer load/store memory operations could be in flight at the same time, with precise
exceptions guaranteed in the event of a fault. Branches had a variable delay slot, the end of which
was signaled by a "split" bit in a subsequent instruction, which indicated that the tagged instruction
marked a split in the instruction stream, and is the last to issue before the preceding branch
condition is resolved.
The FPU was in fact an off-the-shelf design from Weitek.
The memory architecture was a bit unusual and complex. For example, the memory modules also
contained much of the interrupt arbitration logic. The reasoning was that, since I/O channels and
CPUs entered along the same axis of the crossbar, interrupt packets had to pass through memory to
get to a CPU. Therefore, the CPUs were obliged to communicate their interrupt mask levels to the
memory controllers, to allow interrupts to be sent to ready CPUs.
Technology
The non-commodity components were CMOS designs synthesised using the Silicon Compilers
tools. Memory was MOS DRAM.
Software
The OS was based on early versions of MACH from CMU. It was certainly the first multiprocessor
version of Mach delivered to a customer (in Beta form, at least). The compilers used Compass front
ends, but the back end was developed internally.
Strong Points
The physical packaging scheme was clean and economical. The ES-1 would have been the most
powerful air-cooled machine of its day.
The compilers were very good at filling more load delay slots than the literature suggested should
have been possible.
Weak Points
The architectural principles were too heavily compromised by the implementation technology and
techniques. What started as a multithreaded machine ended up as merely a set of CPUs that
supported a largish number (for the day) of outstanding memory requests.
The silicon compilation technology employed resulted in large, slow chips, limiting the chip yield to
dangerously low levels and yielding a maximum clock speed of 40Mhz for the FPUs, and half that
for the custom integer pipelines. This was not terribly impressive for a "supercomputer", even in
1989.
Because of a naive belief that the design was correct "because we simulated it", little or no provision
was made to observe the internal state of the machine during bring-up.
The Fatal Flaw
The crossbar arbitration algorithm was patented. And defective. Rather than implement FIFO or
round-robin, it used a scheme which alternated priority between the "rightmost" requestor and the
"leftmost" requestor. Under load, requestors in the middle would get no service for unbounded
periods of time. Memory delays of thousands of cycles were often seen. The project was in deep
trouble by late 1989, but the need to redesign and respin the crossbar was the last straw. The
project was shut down instead.
Lessons Learned
Don't believe what the design automation salesman tells you his tools will let you do.
There are never enough cycles to fully simulate a complex design before tape-out. Assume that
there will be bugs, and that they will have to be hunted down.
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